PCF8563PSLASHF4 datasheet(49/50 Pages) NXP

49 / 50 page

PCF8563

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Product data sheet

Rev. 10 — 3 April 2012

49 of 50

NXP Semiconductors

PCF8563

Real-time clock/calendar

24. Figures

Fig 1.

Block diagram of PCF8563 . . . . . . . . . . . . . . . . . .3

Fig 2.

Pin configuration for HVSON10 (PCF8563BS) . . .4

Fig 3.

Pin configuration for DIP8 (PCF8563P) . . . . . . . . .4

Fig 4.

Pin configuration for SO8 (PCF8563T) . . . . . . . . .4

Fig 5.

Pin configuration for TSSOP8 (PCF8563TS). . . . .4

Fig 6.

Interrupt scheme . . . . . . . . . . . . . . . . . . . . . . . . . .9

Fig 7.

Voltage-low detection. . . . . . . . . . . . . . . . . . . . . .10

Fig 8.

Data flow for the time function . . . . . . . . . . . . . . .13

Fig 9.

Access time for read/write operations . . . . . . . . .14

Fig 10. Alarm function block diagram. . . . . . . . . . . . . . . .16

Fig 11. STOP bit functional diagram . . . . . . . . . . . . . . . .20

Fig 12. STOP bit release timing . . . . . . . . . . . . . . . . . . . .20

Fig 13. POR override sequence . . . . . . . . . . . . . . . . . . .23

Fig 14. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

Fig 15. Definition of START and STOP conditions. . . . . .24

Fig 16. System configuration . . . . . . . . . . . . . . . . . . . . . .25

Fig 17. Acknowledgement on the I2C-bus . . . . . . . . . . . .25

Fig 18. Slave address . . . . . . . . . . . . . . . . . . . . . . . . . . .26

Fig 19. Master transmits to slave receiver

(WRITE mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .26

Fig 20. Master reads after setting register address

(write register address; READ data) . . . . . . . . . .27

Fig 21. Master reads slave immediately after first byte

(READ mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Fig 22. Interface watchdog timer . . . . . . . . . . . . . . . . . . .28

Fig 23. Device diode protection diagram . . . . . . . . . . . . .29

Fig 24. Supply current IDD as a function of supply

voltage VDD; CLKOUT disabled . . . . . . . . . . . . . .32

Fig 25. Supply current IDD as a function of supply

voltage VDD; CLKOUT = 32 kHz . . . . . . . . . . . . .32

Fig 26. Supply current IDD as a function of temperature

T; CLKOUT = 32 kHz . . . . . . . . . . . . . . . . . . . . . .33

Fig 27. Frequency deviation as a function of supply

voltage VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

Fig 28. I2C-bus timing waveforms . . . . . . . . . . . . . . . . . .35

Fig 29. Application diagram . . . . . . . . . . . . . . . . . . . . . . .36

Fig 30. Package outline SOT650-1 (HVSON10) of

PCF8563BS . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

Fig 31. Package outline SOT97-1 (DIP8) of PCF8563P .38

Fig 32. Package outline SOT96-1 (SO8) of PCF8563T. .39

Fig 33. Package outline SOT505-1 (TSSOP8) of

PCF8563TS . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40

Fig 34. Temperature profiles for large and small

components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

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