PCF8563PSLASHF4 datasheet(10/50 Pages) NXP

10 / 50 page

PCF8563

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Product data sheet

Rev. 10 — 3 April 2012

10 of 50

NXP Semiconductors

PCF8563

Real-time clock/calendar

8.4 Time and date registers

The majority of the registers are coded in the BCD format to simplify application use.

8.4.1 Register VL_seconds

[1]

Start-up value.

8.4.1.1

Voltage-low detector and clock monitor

The PCF8563 has an on-chip voltage-low detector (see Figure 7). When VDD drops below

Vlow, bit VL in the VL_seconds register is set to indicate that the integrity of the clock

information is no longer guaranteed. The VL flag can only be cleared by using the

interface.

Table 8.

VL_seconds - seconds and clock integrity status register (address 02h) bit

description

Bit

Symbol

Value

Place value Description

clock integrity is guaranteed

1[1]

integrity of the clock information is not guaranteed

6 to 4 SECONDS 0 to 5

ten’s place

actual seconds coded in BCD format, see Table 9

3 to 0

0 to 9

unit place

Table 9.

Seconds coded in BCD format

Seconds value

(decimal)

Upper-digit (ten’s place)

Digit (unit place)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

000

0000

000

0001

000

0010

:::

::::

000

1001

001

0000

:::

::::

101

1000

101

1001

Fig 7.

Voltage-low detection

VL set

normal power

operation

period of battery

operation

VDD

Vlow

mgr887

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