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PCF8563P/F4 数据表(PDF) 5 Page - NXP Semiconductors |
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PCF8563P/F4 数据表(HTML) 5 Page - NXP Semiconductors |
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5 / 50 page  PCF8563 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 10 — 3 April 2012 5 of 50 NXP Semiconductors PCF8563 Real-time clock/calendar 7.2 Pin description [1] The die paddle (exposed pad) is wired to VSS but should not be electrically connected. Table 3. Pin description Symbol Pin Description DIP8, SO8, TSSOP8 HVSON10 OSCI 1 1 oscillator input OSCO 2 2 oscillator output INT 3 4 interrupt output (open-drain; active LOW) VSS 45[1] ground SDA 5 6 serial data input and output SCL 6 7 serial clock input CLKOUT 7 8 clock output, open-drain VDD 8 9 supply voltage n.c. - 3, 10 not connected; do not connect and do not use as feed through |
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