数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

JS28F512P30TFA 数据表(PDF) 39 Page - Micron Technology

部件名 JS28F512P30TFA
功能描述  Numonyx Axcell P30-65nm Flash Memory
PDF  86 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICRON [Micron Technology]
网页  http://www.micron.com
标志 MICRON - Micron Technology

JS28F512P30TFA 数据表(HTML) 39 Page - Micron Technology

Back Button JS28F512P30TFA Datasheet HTML 35Page - Micron Technology JS28F512P30TFA Datasheet HTML 36Page - Micron Technology JS28F512P30TFA Datasheet HTML 37Page - Micron Technology JS28F512P30TFA Datasheet HTML 38Page - Micron Technology JS28F512P30TFA Datasheet HTML 39Page - Micron Technology JS28F512P30TFA Datasheet HTML 40Page - Micron Technology JS28F512P30TFA Datasheet HTML 41Page - Micron Technology JS28F512P30TFA Datasheet HTML 42Page - Micron Technology JS28F512P30TFA Datasheet HTML 43Page - Micron Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 86 page
background image
Datasheet
Sept 2012
39
Order Number:208042-0
6
P30-65nm
Table 15: End of Wordline Data and WAIT state Comparison
11.2.4
WAIT Polarity (RCR.10)
The WAIT Polarity bit (WP), RCR.10 determines the asserted level (VOH or VOL) of WAIT.
When WP is set, WAIT is asserted high. When WP is cleared, WAIT is asserted low
(default). WAIT changes state on valid clock edges during active bus cycles (CE#
asserted, OE# asserted, RST# deasserted).
11.2.5
WAIT Delay (RCR.8)
The WAIT Delay (WD) bit controls the WAIT assertion-delay behavior during
synchronous burst reads. WAIT can be asserted either during or one data cycle before
valid data is output on DQ[15:0]. When WD is set, WAIT is deasserted one data cycle
before valid data (default). When WD is cleared, WAIT is deasserted during valid data.
11.2.6
Burst Sequence (RCR.7)
The Burst Sequence (BS) bit selects linear-burst sequence (default). Only linear-burst
sequence is supported. Table 17 shows the synchronous burst sequence for all burst
lengths, as well as the effect of the Burst Wrap (BW) setting.
Latency Count
P30-130nm
P30-65nm
Data States
WAIT States
Data States
WAIT States
1
Not Supported
Not Supported
Not Supported
Not Supported
2
4
0 to 1
Not Supported
Not Supported
3
4
0 to 2
Not Supported
Not Supported
4
4
0 to 3
Not Supported
Not Supported
5
4
0 to 4
16
0 to 4
6
4
0 to 5
16
0 to 5
7
4
0 to 6
16
0 to 6
8
Not Supported
Not Supported
16
0 to 7
9
16
0 to 8
10
16
0 to 9
11
16
0 to 10
12
16
0 to 11
13
16
0 to 12
14
16
0 to 13
15
16
0 to 14
Table 16: WAIT Functionality Table
Condition
WAIT
Notes
CE# = ‘1’, OE# = ‘X’ or CE# = ‘0’, OE# = ‘1’
High-Z
1
CE# =’0’, OE# = ‘0’
Active
1
Synchronous Array Reads
Active
1
Synchronous Non-Array Reads
Active
1
All Asynchronous Reads
Deasserted
1
All Writes
High-Z
1,2
Notes:
1.
Active: WAIT is asserted until data becomes valid, then deasserts.
2.
When OE# = VIH during writes, WAIT = High-Z.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com