AD7654ASTZ datasheet(16/28 Pages) AD

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AD7654

Rev. B | Page 16 of 28

TYPICAL CONNECTION DIAGRAM

Figure 18 shows a typical connection diagram for the AD7654.

Different circuitry shown on this diagram is optional and is

discussed in the following sections.

ANALOG INPUTS

Figure 19 shows a simplified analog input section of the

AD7654.

INA1

INB2

AGND

AVDD

INA2

INAN

INBN

INB1

A0 = L

A0 = H

Figure 19. Simplified Analog Input

The diodes shown in Figure 19 provide ESD protection for the

inputs. Care must be taken to ensure that the analog input

signal never exceeds the absolute ratings on these inputs. This

causes these diodes to become forward biased and start

conducting current. These diodes can handle a forward-biased

current of 120 mA maximum. This condition could eventually

occur when the input buffers (U1) or (U2) supplies are different

from AVDD. In such a case, an input buffer with a short-circuit

current limitation can be used to protect the part.

This analog input structure allows the sampling of the

differential signal between INx and INxN. Unlike other

converters, the INxN is sampled at the same time as the INx

input. By using these differential inputs, small signals common

to both inputs are rejected.

During the acquisition phase, for ac signals, the AD7654

behaves like a one-pole RC filter consisting of the equivalent

resistance RA, RB, and CS. The resistors RA and RB are typically

500 Ω and are a lumped component made up of some serial

resistors and the on resistance of the switches. The capacitor CS

is typically 32 pF and is mainly the ADC sampling capacitor.

This one-pole filter with a typical −3 dB cutoff frequency of

10 MHz reduces undesirable aliasing effects and limits the noise

coming from the inputs.

Because the input impedance of the AD7654 is very high, the

AD7654 can be driven directly by a low impedance source

without gain error. To further improve the noise filtering of the

AD7654 analog input circuit, an external one-pole RC filter

between the amplifier output and the ADC input, as shown in

Figure 18, can be used. However, the source impedance has to

be kept low because it affects the ac performance, especially the

total harmonic distortion. The maximum source impedance

depends on the amount of total harmonic distortion (THD)

that can be tolerated. The THD degrades as the source

impedance increases.

INPUT CHANNEL MULTIPLEXER

The AD7654 allows the choice of simultaneously sampling the

inputs pairs INA1/INB1 or INA2/INB2 with the A0 multiplexer

input. When A0 is low, the input pairs INA1/INB1 are selected,

and when A0 is high, the input pairs INA2/INB2 are selected.

Note that INAx is always converted before INBx regardless of

the state of the digital interface channel selection A/B pin. Also,

note that the channel selection control A0 should not be

changed during the acquisition phase of the converter. Refer to

the Conversion Control section and Figure 22 for timing details.

DRIVER AMPLIFIER CHOICE

Although the AD7654 is easy to drive, the driver amplifier

needs to meet at least the following requirements:

• For multichannel, multiplexed applications, the driver

amplifier and the AD7654 analog input circuit together

must be able to settle for a full-scale step of the capacitor

array at a 16-bit level (0.0015%). In the amplifier’s data

sheet, the settling at 0.1% or 0.01% is more commonly

specified. It could significantly differ from the settling time

at a 16-bit level and, therefore, it should be verified prior to

the driver selection.

• The noise generated by the driver amplifier needs to be kept

as low as possible to preserve the SNR and transition noise

performance of the AD7654. The noise coming from the

driver is filtered by the AD7654 analog input circuit one-

pole low-pass filter made by RA, RB, and CS. The SNR

degradation due to the amplifier is

⎟

⎠

⎞

⎜

⎝

⎛

−

)

(

log

LOSS

SNR

where:

f–3 dB is the –3 dB input bandwidth in MHz of the AD7654

(10 MHz) or the cutoff frequency of the input filter, if

any is used.

is the noise factor of the amplifier (1 if in buffer

configuration).

is the equivalent input noise voltage of the

op amp in nV/√Hz.

For instance, a driver like the AD8021 with an equivalent

input noise of 2 nV/√Hz, configured as a buffer, and thus

with a noise gain of +1, degrades the SNR by only 0.06 dB

with the filter in Figure 18, and by 0.10 dB without.

• The driver needs to have a THD performance suitable to

that of the AD7654.

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