AD7654ASTZ datasheet(24/28 Pages) AD

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AD7654

Rev. B | Page 24 of 28

MICROPROCESSOR INTERFACING

The AD7654 is ideally suited for traditional dc measurement

applications supporting a microprocessor and for ac signal

processing applications interfacing to a digital signal processor.

The AD7654 is designed to interface with either a parallel 8-bit

wide or 16-bit wide interface, a general-purpose serial port, or

I/O ports on a microcontroller. A variety of external buffers can

be used with the AD7654 to prevent digital noise from coupling

into the ADC. The following section illustrates the use of the

AD7654 with an SPI-equipped DSP, the ADSP-219x.

SPI INTERFACE (ADSP-219X)

Figure 34 shows an interface diagram between the AD7654 and

the SPI equipped ADSP-219x. To accommodate the slower

speed of the DSP, the AD7654 acts as a slave device and data

must be read after conversion. This mode also allows the daisy-

chain feature. The convert command can be initiated in

response to an internal timer interrupt. The 32-bit output data

is read with two serial peripheral interface (SPI) 16-bit wide

accesses. The reading process can be initiated in response to the

end-of-conversion signal (BUSY going low) using an

interrupt line of the DSP. By writing to the SPI control register

(SPICLTx), the serial interface (SPI) on the ADSP-219x is

configured for master mode (MSTR) = 1, clock polarity bit

(CPOL) = 0, clock phase bit (CPHA) = 1, and SPI interrupt

enable (TIMOD) = 00. To meet all timing requirements, the SPI

clock should be limited to 17 Mbps, which allows it to read an

ADC result in less than 1 μs. When a higher sampling rate is

desired, use of one of the parallel interface modes is

recommended.

AD7654*

ADSP-219x*

SER/PAR

PFx

MISOx

SCKx

PFx or TFSx

BUSY

SDOUT

SCLK

CNVST

EXT/INT

INVSCLK

DVDD

*ADDITIONAL PINS OMITTED FOR CLARITY

SPIxSEL (PFx)

Figure 34. Interfacing the AD7654 to an SPI Interface

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