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PIC16F1459-ESSQTP 数据表(PDF) 8 Page - Microchip Technology |
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PIC16F1459-ESSQTP 数据表(HTML) 8 Page - Microchip Technology |
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8 / 418 page  PIC16(L)F145X DS41639A-page 8 Preliminary 2012 Microchip Technology Inc. TABLE 2: 14-PIN ALLOCATION TABLE (PIC16(L)F1455) RA0 13 12 — — — — — D+ — — — IOC ICSPDAT(3) RA1 12 11 — — — — — D- — — — IOC ICSPCLK(3) RA2 — — — — — — — — — — — — — RA3 4 3 — — — T1G(2) — — — — SS(2) IOC MCLR VPP RA4 3 2 AN3 — — SOSCO T1G(1) — — — — SDO(2) IOC CLKOUT OSC2 CLKR(1) RA5 2 1 — — — SOSCI T1CKI — — — PWM2(2) — IOC CLKIN OSC1 RC0 10 9 AN4 VREF+ C1IN+ C2IN+ — — — — — SCL SCK — ICSPDAT RC1 9 8 AN5 — C1IN1- C2IN1- — CWGFLT — — — SDA SDI INT ICSPCLK RC2 8 7 AN6 DACOUT1 C1IN2- C2IN2- — — — — — SDO(1) — — RC3 7 6 AN7 DACOUT2 C1IN3- C2IN3- — — — — PWM2(1) SS(1) — CLKR(2) RC4 6 5 — — C1OUT C2OUT — CWG1B — TK CK — — — — RC5 5 4 — — — T0CKI CWG1A — RX DT PWM1 — — — VDD 1 16 — — — — — — — — — — VDD VSS 14 13 — — — — — — — — — — VSS VUSB3V3 11 10 — — — — — VUSB3V3 — — — — — Note 1: Default location for peripheral pin function. Alternate location can be selected using the APFCON register. 2: Alternate location for peripheral pin function selected by the APFCON register. 3: LVP support for PIC18(L)F1XK50 legacy designs. |
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