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PIC16F1459-ESSQTP 数据表(PDF) 17 Page - Microchip Technology |
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PIC16F1459-ESSQTP 数据表(HTML) 17 Page - Microchip Technology |
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17 / 418 page  2012 Microchip Technology Inc. Preliminary DS41639A-page 17 PIC16(L)F1454/5/9 TABLE 1-3: PIC16(L)F1455 PINOUT DESCRIPTION Name Function Input Type Output Type Description RA0/D+/ICSPDAT(3) RA0 TTL CMOS General purpose I/O. D+ XTAL XTAL USB differential plus line. ICSPDAT ST CMOS ICSP™ Data I/O. RA1/D-/ICSPCLK(3) RA1 TTL CMOS General purpose I/O. D- XTAL XTAL USB differential minus line. ICSPCLK ST — ICSP Programming Clock. RA3/VPP/T1G(2)/SS(2)/MCLR RA3 TTL — General purpose input with IOC and WPU. VPP HV — Programming voltage. T1G ST — Timer1 Gate input. SS ST — Slave Select input. MCLR ST — Master Clear with internal pull-up. RA4/AN3/SOSCO/CLKOUT/ T1G(1)/SDO(2)/CLKR(1)/OSC2 RA4 TTL CMOS General purpose I/O. AN3 AN — A/D Channel input. SOSCO XTAL XTAL Secondary Oscillator Connection. CLKOUT — CMOS FOSC/4 output. T1G ST — Timer1 Gate input. SDO — CMOS SPI data output. CLKR — CMOS Clock reference output. OSC2 XTAL XTAL Primary Oscillator connection. RA5/CLKIN/SOSCI/T1CKI/ PWM2(2)/OSC1 RA5 TTL CMOS General purpose I/O. CLKIN CMOS — External clock input (EC mode). SOSCI XTAL XTAL Secondary Oscillator Connection. T1CKI ST — Timer1 clock input. PWM2 — CMOS PWM output. OSC1 XTAL XTAL Primary Oscillator Connection. RC0/AN4/VREF+/C1IN+/C2IN+/ SCL/SCK/ICSPDAT RC0 TTL CMOS General purpose I/O. AN4 AN — A/D Channel input. VREF+ AN — Positive Voltage Reference input. C1IN+ AN — Comparator positive input. C2IN+ AN — Comparator positive input. SCL I2COD I2C™ clock. SCK ST CMOS SPI clock. ICSPDAT ST CMOS ICSP™ Data I/O. Legend: AN = Analog input or output CMOS= CMOS compatible input or output OD = Open Drain TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I2C™ = Schmitt Trigger input with I2C HV = High Voltage XTAL = Crystal levels Note 1: Default location for peripheral pin function. Alternate location can be selected using the APFCON register. 2: Alternate location for peripheral pin function selected by the APFCON register. 3: LVP support for PIC18(L)F1XK50 legacy designs. |
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