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PIC16F1459-ESSQTP 数据表(PDF) 84 Page - Microchip Technology

部件名 PIC16F1459-ESSQTP
功能描述  14/20-Pin Flash, 8-Bit USB Microcontrollers with XLP Technology
PDF  418 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16F1459-ESSQTP 数据表(HTML) 84 Page - Microchip Technology

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PIC16(L)F1454/5/9
DS41639A-page 84
Preliminary
 2012 Microchip Technology Inc.
6.12
Determining the Cause of a Reset
Upon any Reset, multiple bits in the STATUS and
PCON registers are updated to indicate the cause of
the Reset. Table 6-3 and Table 6-4 show the Reset
conditions of these registers.
TABLE 6-3:
RESET STATUS BITS AND THEIR SIGNIFICANCE
TABLE 6-4:
RESET CONDITION FOR SPECIAL REGISTERS(2)
STKOVF STKUNF RWDT RMCLR
RI
POR
BOR
TO
PD
Condition
0
0
1
1
10
x1
1
Power-on Reset
0
0
1
1
10
x0
x
Illegal, TO is set on POR
0
0
1
1
10
xx
0
Illegal, PD is set on POR
0
0
u
1
1u
01
1
Brown-out Reset
u
u
0
u
uu
u0
u
WDT Reset
u
u
u
u
uu
u0
0
WDT Wake-up from Sleep
u
u
u
u
uu
u1
0
Interrupt Wake-up from Sleep
u
u
u
0
uu
uu
u
MCLR Reset during normal operation
u
u
u
0
uu
u1
0
MCLR Reset during Sleep
u
u
u
u
0
u
u
u
u
RESET Instruction Executed
1
u
u
u
uu
uu
u
Stack Overflow Reset (STVREN = 1)
u
1
u
u
uu
uu
u
Stack Underflow Reset (STVREN = 1)
Condition
Program
Counter
STATUS
Register
PCON
Register
Power-on Reset
0000h
---1 1000
00-- 110x
MCLR Reset during normal operation
0000h
---u uuuu
uu-- 0uuu
MCLR Reset during Sleep
0000h
---1 0uuu
uu-- 0uuu
WDT Reset
0000h
---0 uuuu
uu-- uuuu
WDT Wake-up from Sleep
PC + 1
---0 0uuu
uu-- uuuu
Brown-out Reset
0000h
---1 1uuu
00-- 11u0
Interrupt Wake-up from Sleep
PC + 1(1)
---1 0uuu
uu-- uuuu
RESET Instruction Executed
0000h
---u uuuu
uu-- u0uu
Stack Overflow Reset (STVREN = 1)
0000h
---u uuuu
1u-- uuuu
Stack Underflow Reset (STVREN = 1)
0000h
---u uuuu
u1-- uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and Global Interrupt Enable bit (GIE) is set, the return address is
pushed on the stack and PC is loaded with the interrupt vector (0004h) after execution of PC + 1.
2: If a Status bit is not implemented, that bit will be read as ‘0’.



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