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MPC8314VRADDA 数据表(PDF) 72 Page - Freescale Semiconductor, Inc |
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MPC8314VRADDA 数据表(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 101 page ![]() MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2 72 Freescale Semiconductor Package and Pin Listings This figure shows the TDM transmit signal timing. Figure 58. TDM Transmit Signals 22 Package and Pin Listings This section details package parameters, pin assignments, and dimensions. The MPC8314E is available in a thermally enhanced plastic ball grid array (TEPBGA II), see Section 22.1, “Package Parameters for the MPC8314E TEPBGA II,” and Section 22.2, “Mechanical Dimensions of the TEPBGA II,” for information on the TEPBGA II. 22.1 Package Parameters for the MPC8314E TEPBGA II The package parameters are as provided in the following list. The package type is 29 mm 29 mm, TEPBGA II. Package outline 29 mm 29 mm Interconnects 620 Pitch 1 mm Module height (typical) 2.23 mm Solder balls 96.5 Sn/3.5 Ag (VR package) Ball diameter (typical) 0.6 mm TDMxTCK TDMxTD TDMxRCK TDMxTFS (output) TDMxTFS (input) tDM tDM_HIGH tDM_LOW tDMIVKH tDM_OUTAC tDMFSIXKH tDMTKHOV tDMTKHOX tDM_OUTHI tDMFSKHOV tDMFSKHOX |
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