Chapter 1: Cyclone III Device Datasheet

1–13

Electrical Characteristics

July 2012

Altera Corporation

Cyclone III Device Handbook

Volume 2

LVDS

(Column

I/Os)

2.375

2.5

2.625

100

—

0.05

1.80

247

—

600

1.125 1.25 1.375

0.55

500 Mbps

 D

MAX

 700 Mbps

1.80

1.05

1.55

BLVDS

(Row I/Os)

(5)

2.375

2.5

2.625

100

—

—

—

—

—

—

—

—

—

—

BLVDS

(Column

I/Os) (5)

2.375

2.5

2.625

100

—

—

—

—

—

—

—

—

—

—

mini-LVDS

(Row I/Os)

(6)

2.375

2.5

2.625

—

—

—

—

—

300

—

600

1.0

1.2

1.4

mini-LVDS

(Column

I/Os) (6)

2.375

2.5

2.625

—

—

—

—

—

300

—

600

1.0

1.2

1.4

(Row

I/Os) (6)

2.375

2.5

2.625

—

—

—

—

—

100

200

600

0.5

1.2

1.5

RSDS

(Column

I/Os) (6)

2.375

2.5

2.625

—

—

—

—

—

100

200

600

0.5

1.2

1.5

(Row I/Os)

(6)

2.375

2.5

2.625

—

—

—

—

—

100

200

600

0.5

1.2

1.4

PPDS

(Column

I/Os) (6)

2.375

2.5

2.625

—

—

—

—

—

100

200

600

0.5

1.2

1.4

Notes to Table 1–18:

(1) For an explanation of terms used in Table 1–18, refer to “Transmitter Output Waveform” in “Glossary” on page 1–27.

(4) LVPECL input standard is only supported at clock input. Output standard is not supported.

(6) Mini-LVDS, RSDS, and PPDS standards are only supported at the output pins for Cyclone III devices.

(Part 2 of 2)

I/O

Standard

Min

Typ

Max

Min

Max

Min

Condition

Max

Min

Typ

Max

Min

Typ

Max