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3.0-VLVCMOS 数据表(PDF) 18 Page - Altera Corporation

部件名 3.0-VLVCMOS
功能描述  This chapterdescribes the electric characteristics, switching characteristics,and I/O timing for Cyclone III devices. A glossary is also included for your reference
PDF  34 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

3.0-VLVCMOS 数据表(HTML) 18 Page - Altera Corporation

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Chapter 1: Cyclone III Device Datasheet
Switching Characteristics
Cyclone III Device Handbook
July 2012
Altera Corporation
Volume 2
High-Speed I/O Specifications
Table 1–26 through Table 1–31 list the high-speed I/O timing for Cyclone III devices.
For definitions of high-speed timing specifications, refer to “Glossary” on page 1–27.
Table 1–26. Cyclone III Devices RSDS Transmitter Timing Specifications
(1), (2)
Symbol
Modes
C6
C7, I7
C8, A7
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fHSCLK
(input clock
frequency)
×10
5
180
5
155.5
5
155.5
MHz
×8
5
180
5
155.5
5
155.5
MHz
×7
5
180
5
155.5
5
155.5
MHz
×4
5
180
5
155.5
5
155.5
MHz
×2
5
180
5
155.5
5
155.5
MHz
×1
5
360
5
311
5
311
MHz
Device operation in
Mbps
×10
100
360
100
311
100
311
Mbps
×8
80
360
80
311
80
311
Mbps
×7
70
360
70
311
70
311
Mbps
×4
40
360
40
311
40
311
Mbps
×2
20
360
20
311
20
311
Mbps
×1
10
360
10
311
10
311
Mbps
tDUTY
45
55
45
55
45
55
%
TCCS
200
200
200
ps
Output jitter
(peak to peak)
500
500
550
ps
tRISE
20 – 80%, CLOAD =
5pF
500
500
500
ps
tFALL
20 – 80%, CLOAD =
5pF
500
500
500
ps
tLOCK (3)
——
1
1
1
ms
Notes to Table 1–26:
(1) Applicable for true RSDS and emulated RSDS_E_3R transmitter.
(2) True RSDS transmitter is only supported at output pin of Row I/O (Banks 1, 2, 5, and 6). Emulated RSDS transmitter is supported at the output
pin of all I/O banks.
(3) tLOCK is the time required for the PLL to lock from the end of device configuration.
Table 1–27. Cyclone III Devices Emulated RSDS_E_1R Transmitter Timing Specifications (1) (Part 1 of 2)
Symbol
Modes
C6
C7, I7
C8, A7
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fHSCLK (input
clock
frequency)
×10
5
85
5
85
5
85
MHz
×8
5
85
5
85
5
85
MHz
×7
5
85
5
85
5
85
MHz
×4
5
85
5
85
5
85
MHz
×2
5
85
5
85
5
85
MHz
×1
5
170
5
170
5
170
MHz



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