Data Sheet

ADM1275

Rev. D | Page 43 of 48

PMON_CONFIG

Code: 0xD4, read/write byte. Value after reset: 0x2C.

Modifying the power monitor settings while the power monitor is sampling is not supported. The power monitor must be stopped before

any setting in Table 37 is changed to ensure correct operation and to prevent any potential spurious data and status alerts being generated.

Table 37. Bit Descriptions for PMON_CONFIG Command

Bits

Bit Name

Settings

Description

7

PMON_MODE

0

Default. This setting selects single-shot sampling mode.

1

This setting selects continuous sampling mode.

6

VIN_VOUT_SELECT

0

Default. The power monitor will sample the input voltage on the SENSE+ pin. On the

ADM1275-2, this bit should always be written as 0.

1

The power monitor will sample the output voltage on the VOUT pin.

5

VRANGE

0

Sets the voltage input range from 0 V to 6 V (low input voltage range).

1

Default. Sets the voltage input range from 0 V to 20 V (high input voltage range).

4

Reserved

0

Reserved. This bit must always be written as 0.

3

Reserved

1

Default. This bit must be set to 1 for the power monitor current sense to operate

correctly.

[2:0]

AVERAGING

000

Disables sample averaging for current and voltage.

001

Sets sample averaging for current and voltage to 2 samples.

010

Sets sample averaging for current and voltage to 4 samples.

011

Sets sample averaging for current and voltage to 8 samples.

100

Sets sample averaging for current and voltage to 16 samples.

101

Sets sample averaging for current and voltage to 32 samples.

110

Sets sample averaging for current and voltage to 64 samples.

111

Sets sample averaging for current and voltage to 128 samples.

ALERT1_CONFIG

Code: 0xD5, read/write word. Value after reset: 0x0000.

This command is supported on the ADM1275-1 and the ADM1275-2. The ADM1275-3 does not have a GPO1/ALERT1/CONV pin.

Table 38. Bit Descriptions for ALERT1_CONFIG Command

Bits

Bit Name

Settings

Description

15

FET_HEALTH_BAD_EN1

0

Default. Disables generation of SMBAlert when the FET_HEALTH_BAD bit is set.

1

Generate SMBAlert when the FET_HEALTH_BAD bit is set.

14

IOUT_OC_FAULT_EN1

0

Default. Disables generation of SMBAlert when the IOUT_OC_FAULT bit is set.

1

Generate SMBAlert when the IOUT_OC_FAULT bit is set.

13

VIN_OV_FAULT_EN1

0

Default. Disables generation of SMBAlert when the VIN_OV_FAULT bit is set.

1

Generate SMBAlert when the VIN_OV_FAULT bit is set.

12

VIN_UV_FAULT_EN1

0

Default. Disables generation of SMBAlert when the VIN_UV_FAULT bit is set.

1

Generate SMBAlert when the VIN_UV_FAULT bit is set.

11

CML_ERROR_EN1

0

Default. Disables generation of SMBAlert when the CML_ERROR bit is set.

1

Generate SMBAlert when the CML_ERROR bit is set.

10

IOUT_OC_WARN_EN1

0

Default. Disables generation of SMBAlert when the IOUT_OC_WARN bit is set.

1

Generate SMBAlert when the IOUT_OC_WARN bit is set.

9

IOUT_WARN2_EN1

0

Default. Disables generation of SMBAlert when the IOUT_WARN2 bit is set.

1

Generate SMBAlert when the IOUT_WARN2 bit is set.

8

VIN_OV_WARN_EN1

0

Default. Disables generation of SMBAlert when the VIN_OV_WARN bit is set.

1

Generate SMBAlert when the VIN_OV_WARN bit is set.

7

VIN_UV_WARN_EN1

0

Default. Disables generation of SMBAlert when the VIN_UV_WARN bit is set.

1

Generate SMBAlert when the VIN_UV_WARN bit is set.

6

VOUT_OV_WARN_EN1

0

Default. Disables generation of SMBAlert when the VOUT_OV_WARN bit is set.

1

Generate SMBAlert when the VOUT_OV_WARN bit is set.