ADM1275-1ACPZ-R7 datasheet(23/48 Pages) AD

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Data Sheet

ADM1275

Rev. D | Page 23 of 48

ADM1275

GND

VCAP

ISET

Figure 53. Adjustable 5 mV to 25 mV Current Sense Limit

The VCAP pin has a 2.7 V (±1.5%) internal generated voltage

that can be used to set a voltage at the ISET pin. Assuming that

VISET equals the voltage on the ISET pin, the resistor divider

should be sized to set the ISET voltage as follows:

VISET = VSENSE × 50

where VSENSE is the current sense voltage limit.

The VCAP rail can also be used as the pull-up supply for setting

the I2C address. The VCAP pin should not be used for any other

purpose. To guarantee accuracy specifications, care should be

taken not to load the VCAP pin by more than 100 μA.

SOFT START

A capacitor connected to the SS pin determines the inrush

current profile. Before the FET is enabled, the output voltage of

the current limit reference selector block is clamped at 100 mV.

This, in turn, holds the hot-swap sense voltage current limit,

VSENSECL, at approximately 2 mV. When the FET is requested to

turn on, the SS pin is held at ground until the voltage between

the SENSE+ and SENSE− pins (VSENSE) reaches the circuit

breaker voltage, VCB.

VCB = VSENSECL − VCBOS

where VCBOS is typically 0.88 mV, making VCB = 1.12 mV.

When the load current generates a sense voltage equal to VCB, a

10 μA current source is enabled, which charges the SS capacitor

and results in a linear ramping voltage on the SS pin. The current

limit reference also ramps up accordingly, allowing the regulated

load current to ramp up while avoiding sudden transients during

power-up. The SS capacitor value is given by

ISET





where:

ISS = 10 μA.

t = SS ramp time.

For example, a 10 nF capacitor gives a soft start time of 1 ms.

Note that the SS voltage may intersect with the FLB (foldback)

voltage, and the current limit reference may change to follow

FLB (see Figure 51). This change has minimal impact on startup

because the output voltage rises at a similar rate to the SS voltage.

GATE

SENSE+

ADM1275

GND

SENSE–

×50

CURRENT

LIMIT

FLB

ISET

TIMEOUT

CURRENT

LIMIT

CONTROL

REF

SELECT

1.0V

CURRENT

LIMIT

VCAP

10µA

GATE

DRIVE/

LOGIC

–

VCP

Figure 54. Soft Start

FOLDBACK

Foldback is a method to actively reduce the current limit as the

voltage drop across the FET increases. It keeps the power across

the FET to a minimum during power-up, overcurrent, or short-

circuit events. It also avoids the need to oversize the FET to

accommodate worst-case conditions, resulting in board size

and cost savings.

The ADM1275 detects the voltage drop across the FET by

looking at a resistor-divided version of the output voltage. It is

assumed that the supply voltage remains constant and within

tolerance. The device therefore relies on the principle that the

drain of the FET is at the maximum expected supply voltage,

and that the magnitude of the output voltage is relative to that

of the VDS of the FET. Using a resistor divider from the output

voltage to the FLB pin, a relationship from VOUT, and thus VDS,

to VFLB can be derived.

The resistor divider should be designed to output a voltage

equal to ISET when VOUT falls below the desired level. This

should be well below the working tolerance of the supply rail.

As VOUT continues to drop, the current limit reference follows

VFLB because it is now the lowest voltage input to the current

limit reference selector block. This results in a reduction of the

current limit and, therefore, the regulated load current. To

prevent complete current flow restriction, a clamp becomes

active when the current limit reference reaches 200 mV. The

current limit cannot drop below this level.

To suit the SOA characteristics of a particular FET, the required

minimum current for this clamp varies from design to design.

However, the current limit reference fixes this clamp at 200 mV,

which equates to 4 mV at the sense resistor. Therefore, the main

ISET voltage can be adjusted to align this clamp to the required

percentage current reduction. For example, if ISET equals 0.8 V,

the clamp can be set at 25% of the maximum current.

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