INA226

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SBOS547

– JUNE 2011

Data transfer is then initiated and eight bits of data are sent, followed by an Acknowledge bit. During data

transfer, SDA must remain stable while SCL is high. Any change in SDA while SCL is high is interpreted as a

start or stop condition.

Once all data have been transferred, the master generates a stop condition, indicated by pulling SDA from low to

high while SCL is high. The INA226 includes a 28ms timeout on its interface to prevent locking up the bus.

Serial Bus Address

To communicate with the INA226, the master must first address slave devices via a slave address byte. The

slave address byte consists of seven address bits and a direction bit that indicates whether the action is to be a

read or write operation.

The INA226 has two address pins, A0 and A1. Table 7 describes the pin logic levels for each of the 16 possible

addresses. The state of pins A0 and A1 is sampled on every bus communication and should be set before any

activity on the interface occurs.

Table 7. INA226 Address Pins and

Slave Addresses

A1

A0

SLAVE ADDRESS

GND

GND

1000000

GND

1000001

GND

SDA

1000010

GND

SCL

1000011

GND

1000100

1000101

SDA

1000110

SCL

1000111

SDA

GND

1001000

SDA

1001001

SDA

SDA

1001010

SDA

SCL

1001011

SCL

GND

1001100

SCL

1001101

SCL

SDA

1001110

SCL

SCL

1001111

Serial Interface

made via the open-drain I/O lines SDA and SCL. The SDA and SCL pins feature integrated spike suppression

filters and Schmitt triggers to minimize the effects of input spikes and bus noise. While there is spike suppression

integrated into the digital I/O lines, proper layout should be used to minimize the amount of coupling into the

communication lines. This noise introduction could occur from capacitively coupling signal edges between the

two communication lines themselves or from other switching noise sources present in the system. Routing traces

in parallel with ground in between layers on a printed circuit board (PCB) typically reduces the effects of coupling

between the communication lines. Shielding communication lines in general is recommended to reduce to

possibility of unintended noise coupling into the digital I/O lines that could be incorrectly interpreted as start or

stop commands.

The INA226 supports the transmission protocol for Fast (1kHz to 400kHz) and High-speed (1kHz to 3.4MHz)

modes. All data bytes are transmitted most significant byte first.

Copyright

© 2011, Texas Instruments Incorporated

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