INA226

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SBOS547

– JUNE 2011

INA226

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

INPUT

Shunt voltage input range

-81.9175

81.92

mV

0

36

V

Common-mode rejection

CMRR

126

140

dB

±2.5

±10

μV

vs Temperature

0.02

0.1

μV/°C

vs Power supply

PSRR

2.5

μV/V

±1.25

±7.5

mV

vs Temperature

10

40

μV/°C

vs Power supply

PSRR

0.5

mV/V

Input bias current

10

μA

830

k

Ω

(VIN+ Pin) + (VIN

– Pin),

0.1

0.5

μA

Power-down mode

DC ACCURACY

ADC native resolution

16

Bits

1 LSB step size

Shunt voltage

2.5

μV

Bus voltage

1.25

mV

Shunt voltage gain error

0.02

0.1

%

vs Temperature

10

50

ppm/

°C

Bus voltage gain error

0.02

0.1

%

vs Temperature

10

50

ppm/

°C

Differential nonlinearity

±0.1

LSB

ADC conversion time

CT bit = 000

140

154

μs

CT bit = 001

204

224

μs

CT bit = 010

332

365

μs

CT bit = 011

588

646

μs

CT bit = 100

1.1

1.21

ms

CT bit = 101

2.116

2.328

ms

CT bit = 110

4.156

4.572

ms

CT bit = 111

8.244

9.068

ms

SMBus

28

35

ms

DIGITAL INPUT/OUTPUT

Input capacitance

3

pF

Leakage input current

0

0.1

1

μA

Input logic levels:

6

V

–0.5

V

Output logic level

0

0.4

V

Hysteresis

500

mV

(1)

While the input range is 36V, the full-scale range of the ADC scaling is 40.96V. See the Basic ADC Functions section. Do not apply

more than 36V.

(2)

RTI = Referred-to-input.

(3)

Input leakage is positive (current flowing into the pin) for the conditions shown at the top of this table. Negative leakage currents can

occur under different input conditions.

(4)

SMBus timeout in the INA226 resets the interface any time SCL is low for more than 28ms.

Copyright

© 2011, Texas Instruments Incorporated

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