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ADP2323ACPZ-R7 数据表(PDF) 18 Page - Analog Devices

部件名 ADP2323ACPZ-R7
功能描述  Dual 3 A, 20 V Synchronous Step-Down Regulator with Integrated High-Side MOSFET
PDF  32 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP2323ACPZ-R7 数据表(HTML) 18 Page - Analog Devices

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ADP2323
Data Sheet
Rev. A | Page 18 of 32
UNDERVOLTAGE LOCKOUT
The undervoltage lockout (UVLO) threshold is 4.2 V with 0.5 V
hysteresis to prevent the device from power-on glitches. When
the PVIN1 or PVIN2 voltage rises above 4.2 V, Channel 1 or
Channel 2 is enabled and the soft start period initiates. When either
PVIN1 or PVIN2 drops below 3.7 V, it turns off Channel 1 or
Channel 2, respectively.
THERMAL SHUTDOWN
In the event that the ADP2323 junction temperature exceeds
150°C, the thermal shutdown circuit turns off the regulator. A
15°C hysteresis is included so that the ADP2323 does not
recover from thermal shutdown until the on-chip temperature
drops below 135°C. Upon recovery, soft start is initiated prior to
normal operation.



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