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STM32F103CBU6 数据表(PDF) 49 Page - STMicroelectronics |
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STM32F103CBU6 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 105 page ![]() DocID13587 Rev 16 49/105 STM32F103x8, STM32F103xB Electrical characteristics 104 Table 18. Typical current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions fHCLK Typ(1) 1. Typical values are measures at TA = 25 °C, VDD = 3.3 V. Unit All peripherals enabled(2) 2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register). All peripherals disabled IDD Supply current in Sleep mode External clock(3) 3. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. 72 MHz 14.4 5.5 mA 48 MHz 9.9 3.9 36 MHz 7.6 3.1 24 MHz 5.3 2.3 16 MHz 3.8 1.8 8 MHz 2.1 1.2 4 MHz 1.6 1.1 2 MHz 1.3 1 1 MHz 1.11 0.98 500 kHz 1.04 0.96 125 kHz 0.98 0.95 Running on high speed internal RC (HSI), AHB prescaler used to reduce the frequency 64 MHz 12.3 4.4 48 MHz 9.3 3.3 36 MHz 7 2.5 24 MHz 4.8 1.8 16 MHz 3.2 1.2 8 MHz 1.6 0.6 4 MHz 1 0.5 2 MHz 0.72 0.47 1 MHz 0.56 0.44 500 kHz 0.49 0.42 125 kHz 0.43 0.41 |
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