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STM32F217VG 数据表(PDF) 159 Page - STMicroelectronics |
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STM32F217VG 数据表(HTML) 159 Page - STMicroelectronics |
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159 / 173 page ![]() STM32F21xxx Application block diagrams Doc ID 17050 Rev 8 159/173 Figure 91. Master clock (MCK) used to drive the external audio DAC 1. I2S_SCK is the I2S serial clock to the external audio DAC (not to be confused with I2S_CK). Figure 92. Master clock (MCK) not used to drive the external audio DAC 1. I2S_SCK is the I2S serial clock to the external audio DAC (not to be confused with I2S_CK). I2S_CK I2S controller I2S_MCK = 256 × FSAUDIO = 11.2896 MHz for FSAUDIO = 44.1 kHz = 12.2880 MHz for FSAUDIO = 48.0 kHz /(2 x 16) /8 /I2SD FSAUDIO I2S_SCK(1) = I2S_MCK/8 for 16-bit stereo for 16-bit stereo /(2 x 32) /4 for 32-bit stereo FSAUDIO 2,3,4,..,129 = I2S_MCK/4 for 32-bit stereo ai16042 I2SCOM_CK I2S controller /(2 x 16) /I2SD FSAUDIO I2S_SCK(1) for 16-bit stereo /(2 x 32) for 32-bit stereo FSAUDIO ai16042 |
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