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STM32F217VG 数据表(PDF) 162 Page - STMicroelectronics |
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STM32F217VG 数据表(HTML) 162 Page - STMicroelectronics |
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162 / 173 page ![]() Revision history STM32F21xxx 162/173 Doc ID 17050 Rev 8 8 Revision history Table 92. Document revision history Date Revision Changes 02-Feb-2010 1 Initial release. 13-Jul-2010 2 Updated datasheet status to PRELIMINARY DATA. Renamed high-speed SRAM, system SRAM. Added UFBGA176 package, and note 1 related to LQFP176 package in Table 2, Figure 11, and Table 90. Added information on ART accelerator and audio PLL (PLLI2S). Added Table 4: USART feature comparison. Several updates on Table 5: STM32F21x pin and ball definitions and Table 7: Alternate function mapping. ADC, DAC, oscillator, RTC_AF, WKUP and VBUS signals removed from alternate functions and moved to the “other functions” column in Table 5: STM32F21x pin and ball definitions. TRACESWO added in Figure 4: STM32F21x block diagram, Table 5: STM32F21x pin and ball definitions, and Table 7: Alternate function mapping. XTAL oscillator frequency updated on cover page, in Figure 4: STM32F21x block diagram and in Section 2.2.11: External interrupt/event controller (EXTI). Updated list of peripherals used for boot mode in Section 2.2.13: Boot modes. Added Regulator bypass mode in Section 2.2.16: Voltage regulator, and Section 5.3.4: Operating conditions at power-up / power-down (regulator OFF). Updated Section 2.2.17: Real-time clock (RTC), backup SRAM and backup registers. Added Note Note: in Section 2.2.18: Low-power modes. Added SPI TI protocol in Section 2.2.23: Serial peripheral interface (SPI). Updated Section 2.2.28: Universal serial bus on-the-go full-speed (OTG_FS), and Section 2.2.29: Universal serial bus on-the-go high- speed (OTG_HS). Added Section 5: Electrical characteristics, and Section 6.2: Thermal characteristics. Updated Table 87: LQFP176 - Low profile quad flat package 24 × 24 × 1.4 mm package mechanical data and Figure 79: LQFP176 - Low profile quad flat package 24 × 24 × 1.4 mm, package outline. Added Table 91: Main applications versus package for STM32F2xxx microcontrollers in A.1: Main applications versus package. Updated figures in Appendix A.3: USB OTG full speed (FS) interface solutions and A.4: USB OTG high speed (HS) interface solutions. Updated Figure 89: Audio player solution using PLL, PLLI2S, USB and 1 crystal and Figure 90: Audio PLL (PLLI2S) providing accurate I2S clock. Added random number generation feature. Added trademark for ART accelerator and updated Section 2.2.2: Adaptive real-time memory accelerator (ART Accelerator™) . |
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