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AS8515

Datasheet - AS8515 Bottom Die Overvi ew

8.3 Digital Implementation of Measurement Path

Figure 17. Block Diagram of Digital Implementation

Figure 17 shows the digital implementation of the decimator and filter to process the 1-bit output of the Modulator. This block receives a 1-bit

pulse density modulated output (MOD_IN) from the second order sigma delta modulator along with the oversampling frequency clock

(MOD_CLK). The MOD_CLK directly goes to a clock division block, which generates chopper clock (CHOP_CLK). The CHOP_CLK can be one

of 2kHz or 4kHz selected by Register CLK_REG in Table 49. The MOD_CLK can be either 1MHz or 2MHz. The Decimation is a two phase

process. In the first phase, the R1 down sampling rate can be obtained by selecting either 64 or 128 in Registers DECREG_R1_I,

DECREG_R1_V in Table 49. The 16-bit CIC1 output is dechopped with respect to CHOP_CLK. The output of Dechopper is passed through the

CIC2 filter with a decimation ratio of 1to 32768 in steps of power of 2. This output is then processed through a FIR or Moving Average (MA) filter.

FIR Filter is provided to offer matched low pass filter response typically required in lead acid battery sensor systems. MA filter is used to provide

averaged output and the number of samples for averaging can be any integer value from 1 to 15.

8.4 Reference-Voltage

Band gap-reference voltage is used for the ADC as a reference and for the generation of the current for external temperature measurement.

8.5 Oscillators

A High-speed oscillator (HS) generates the oversampling clock. For internal state machine and Interrupt generation, a low-speed Oscillator (LS)

is also available.

8.6 Power-On Reset

The AS8515 has PORs, APOR and DPOR on analog and digital power supplies respectively. On PORs of both supplies, initialization sequence

happens and the system status is shown in state diagram (see Figure 18).

As shown in the state diagram, the system is in RESET state until DPOR output goes to logic HIGH and subsequently until APOR output goes to

logic HIGH. Once analog power supply is available, the system goes into OTP_INT state and loads the default values into the control and data

registers and goes into STOP state. If analog POR, APOR goes low at any time, the system goes into RESET state. In the STOP state, the

AS8515 can be programmed and by giving start command it starts working following the state machine.

CIC1

64 / 128

CLK DIVISION

BLOCK

Dechopper

FIR / MA

MOD_I

N

MOD_CLK

DATAOUT

R1

R1 = First decimation ratio (64 or 128)

R2 = Second decimation ratio (1 to 32768)

MOD_CLK

R1

CIC2

R2

FIR_MA_SEL

CHP_CLK