AS8515 datasheet(46/65 Pages) AMSCO

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AS8515

Datasheet - 4-W i re SPI Interf ace

Figure 28. Protocol for Serial Data Write with Length = 4

9.1.3 Read Command

For Read command C0=1.

After the command code C0 and two reserved bits, the address of register to be read has to be provided from the MSB to the LSB. Then one or

more data bytes can be transferred from the SPI slave to the master, always from the MSB to the LSB. To transfer more bytes from consecutive

addresses, SPI master has to keep active the SPI CS signal and the SPI clock as long as it desires to read data from the slave. Each bit of the

command and address sections of the frame have to be driven by the SPI master on the SPI clock transfer edge and the SPI slave on the next

SPI clock edge samples it. Each bit of the data section of the frame has to be driven by the SPI slave on the SPI clock transfer edge and the SPI

master on the next SPI clock edge samples it. These edges are selected as per clock polarity settings. In the following figures, two examples of

read command (without and with address self-increment) have been shown.

Figure 29. Protocol for Serial Data Read with Length = 1

SCLK

SDI

SDO

Data D7-D0 is

moved to Address

A4-A0 here

Data D7-D0 is

moved to Address

A4-A0 +1 here

Data D7-D0 is

moved to Address

A4-A0 +2 here

Data D7-D0 is

moved to Address

A4-A0 +3 here

Data D7-D0 is

moved to Address

A4-A0 +4 here

SCLK

SDI

SDO

RES1

RES0

Transfer edge

Sampling edge

Data D7 – D0 at Address A4..A0

is read here

Transfer edge

Sampling edge

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