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TLE7232GS 数据表(PDF) 7 Page - Infineon Technologies AG |
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TLE7232GS 数据表(HTML) 7 Page - Infineon Technologies AG |
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7 / 32 page ![]() PG-SSOP-24-6 .emf (top view) 24 23 22 21 20 19 1 2 3 4 5 6 7 8 9 10 18 17 16 15 11 12 14 13 IN0 OUT2 OUT3 GND CS GND GND GND OUT4 OUT5 VSO SO VDD OUT1 OUT0 RST OUT7 OUT6 SI SCLK IN2 IN3 NC NC Data Sheet 7 Rev. 1.0, 2007-12-18 SPI Driver for Enhanced Relay Control SPIDER - TLE7232GS Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure 3 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol I/O Function Power Supply 17 V DD – Power Supply 5 V SO – Power Supply for SO buffer 1, 2, 11, 12 GND – Ground Power Stages 14 OUT0 O Drain of power transistor channel 0 15 OUT1 O Drain of power transistor channel 1 22 OUT2 O Drain of power transistor channel 2 23 OUT3 O Drain of power transistor channel 3 3 OUT4 O Drain of power transistor channel 4 4 OUT5 O Drain of power transistor channel 5 9 OUT6 O Drain of power transistor channel 6 10 OUT7 O Drain of power transistor channel 7 |
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