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TLE7232GS 数据表(PDF) 12 Page - Infineon Technologies AG |
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TLE7232GS 数据表(HTML) 12 Page - Infineon Technologies AG |
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12 / 32 page ![]() channel 7 channel 6 channel 5 channel 4 InputLogic_GS .emf IN2 IIN IN3 I IN IN0 IIN channel 3 & OR OUT3 BOL3 MAP3 gate control SLE3 MAP0 OUT0 BOL0 SLE0 channel 1 & OR MAP1 OUT1 BOL1 gate control SLE1 MAP0 OUT0 BOL0 SLE0 channel 2 & OR MAP2 OUT2 BOL2 gate control SLE2 MAP0 OUT0 BOL0 SLE0 channel 0 & OR MAP0 OUT0 BOL0 gate control SLE0 SPI Driver for Enhanced Relay Control SPIDER - TLE7232GS Block Description and Electrical Characteristics Data Sheet 12 Rev. 1.0, 2007-12-18 5.1.2 Input Circuit There are three input pins available at SPIDER - TLE7232GS to control the output stages. Figure 4 Input Mapping and Boolean Operator The input signal of IN3 can be configured to be used as control signal of the output stages for each channel separately. The channels 0 to 2 differ from the channels 3 to 7 in the mapping behavior. IN0 is a direct input to channel Out0, while IN2 is a direct input to Out2. OUT0 can be switched with the SPI Flag MAP0 to the mappable input IN3, default is IN0. OUT2 can be switched with the SPI Flag MAP2 to the mappable input IN3, default is IN2. OUT3 is controlled by default with IN3, but IN3 can be programmed to each channel. Therefore after power up the inputs are always mapped to their corresponding outputs. Please refer to Figure 4 for details. The current sink to ground at the input pins ensures that the channels switch off in case of open pin. The zener diode protects the input circuit against ESD pulses. |
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