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TLE7232GS 数据表(PDF) 13 Page - Infineon Technologies AG |
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TLE7232GS 数据表(HTML) 13 Page - Infineon Technologies AG |
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13 / 32 page ![]() OutputClamp.emf Vbat I D VDS(CL) OUT V DS GND L, RL Data Sheet 13 Rev. 1.0, 2007-12-18 SPI Driver for Enhanced Relay Control SPIDER - TLE7232GS Block Description and Electrical Characteristics 5.1.3 Inductive Output Clamp When switching off inductive loads, the potential at pin OUT rises to V DS(CL) potential, because the inductance intends to continue driving the current. The voltage clamping is necessary to prevent destruction of the device, see Figure 5 for details. Nevertheless, the maximum allowed load inductance is limited. Figure 5 Output Clamp Implementation Maximum Load Inductance CS VDS t SwitchOn.emf tON tOFF t 20% 80% SPI: ON SPI: OFF During demagnetization of inductive loads, energy has to be dissipated in the SPIDER - TLE7232GS. This energy can be calculated with following equation: (1) The equation simplifies under the assumption of R L = 0: (2) The energy, which is converted into heat, is limited by the thermal design of the component. 5.1.4 Timing Diagrams The power transistors are switched on and off with a dedicated slope via the OUT bits of the serial peripheral interface SPI. The switching times t ON and tOFF are designed equally. Figure 6 Switching a Resistive Load When the input mapping is configured accordingly, a high signal at the input pin is equivalent to a SPI ON command. EVDS(CL) Vbat V – DS(CL) RL ---------------------------------- ln ⋅ 1 RL ID ⋅ Vbat V – DS(CL) ---------------------------------- – ID + L RL ------ ⋅⋅ = E 1 2 --- LID 2 1 Vbat Vbat V – DS(CL) ---------------------------------- – ⋅ = |
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