SI

device 1

SPI

SO

SI

device 2

SPI

SO

SI

device 3

SPI

SO

MO

MI

MCS

MCLK

SPI_DasyChain.emf

MI

MO

MCS

MCLK

SI device 3

SI device 2

SI device 1

SO device 3

SO device 2

SO device 1

time

SPI_DasyChain2.emf

SPI Driver for Enhanced Relay Control

SPIDER - TLE7232GS

Block Description and Electrical Characteristics

Data Sheet

24

Rev. 1.0, 2007-12-18

5.4.2

Daisy Chain Capability

The SPI of SPIDER - TLE7232GS provides daisy chain capability. In this configuration several devices are

activated by the same CS signal MCS. The SI line of one device is connected with the SO line of another device

(see Figure 13), which builds a chain. The ends of the chain are connected with the output and input of the master

device, MO and MI respectively. The master device provides the master clock MCLK, which is connected to the

SCLK line of each device in the chain.

Figure 13

Daisy Chain Configuration

In the SPI block of each device, there is one shift register where one bit from SI line is shifted in each SCLK. The

bit shifted out can be seen at SO. After 16 SCLK cycles, the data transfer for one device has been finished. In

single chip configuration, the CS line must go high to make the device accept the transferred data. In daisy chain

configuration the data shifted out at device #1 has been shifted in to device #2. When using three devices in daisy

chain, three times 16 bits have to be shifted through the devices. After that, the MCS line must go high (see

Figure 14).

Figure 14

Data Transfer in Daisy Chain Configuration