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MB86604LPFV 数据表(PDF) 41 Page - fujitsu semiconductor |
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MB86604LPFV 数据表(HTML) 41 Page - fujitsu semiconductor |
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41 / 56 page ![]() 41 MB86604L (8) A/N/S values in the SCSI interface timing specification • Transfer period register (address 0Dh) and A/N values Note: The A and N values set in the register are the assert period and the negate period respectively (unit is clock cycles) For the AC characteristics, A/N use numerals. • Asynchronous setup time register (address 17h) setting and the S value. Note: The S (setup time) value established in the set up time register during asynchronous data transfers indicates the time from setting data in the data bus until the REQ/ACK signals are asserted. For the AC characteristics, S uses numerals. Transfer period register AN Transfer period register AN Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 00001 Prohibit Prohibit 10001 9 8 00010 1 1 10010 9 9 00011 2 1 10011 10 9 00100 2 2 10100 10 10 00101 3 2 10101 11 10 00110 3 3 10110 11 11 00111 4 3 10111 12 11 01000 4 4 11000 12 12 01001 5 4 11001 13 12 01010 5 5 11010 13 13 01011 6 5 11011 14 13 01100 6 6 11100 14 14 01101 7 6 11101 15 14 01110 7 7 11110 15 15 01111 8 7 11111 16 15 10000 8 8 00000 16 16 Asynchronous setup time register S Asynchronous setup time register S Bit 3 Bit 2 Bit 1 Bit 0 Bit 3 Bit 2 Bit 1 Bit 0 0001 1 1001 9 0010 2 1010 10 0011 3 1011 11 0100 4 1100 12 0101 5 1101 13 0110 6 1110 14 0111 7 1111 15 1000 8 0000 16 |
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