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MB86604LPFV 数据表(PDF) 37 Page - fujitsu semiconductor |
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MB86604LPFV 数据表(HTML) 37 Page - fujitsu semiconductor |
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37 / 56 page ![]() 37 MB86604L (7) SCSI interface (as initiator) • Asynchronous transfer mode (a) Input timing (initiator → target) *1: The position number indicates the position in the waveform. *2: The REQ “L” → REQ “L” time (tAKRQ2) is compared with (tAKRQH + tRQAKH + tAKRQ1) and the longer value is chosen. Note: The input timing definition is not applied in the following cases. • When the data register is FULL in the data phase • When the final byte is being transferred Parameter Symbol Value Unit Base signal Position*1 Min. Max. ACK “L” assert time REQ “L” tRQAKL A0 — ns REQ “H” negate time ACK “L” tAKRQH B — 60 ns ACK “H” negate time REQ “H” tRQAKH C0— ns Input data set up time ACK “L” tsuDB D10— ns Input data hold time ACK “L” thDB E20 — ns ACK “L” assert time 1 ACK “H” tAKRQ1 F — 40 ns ACK “L” assert time 2 *2 ACK “H” tALRQ2 G— 3 tCLK + 40 ns A Data DB7 to DB0 DBP G E REQ ACK F C D B t AKRQ2 t RQAKL t AKRQH t RQAKH t AKRQ1 t hDB t suDB |
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