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MSP430F5259 数据表(PDF) 45 Page - Texas Instruments |
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MSP430F5259 数据表(HTML) 45 Page - Texas Instruments |
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45 / 107 page  V CC V IO V CC ≤ V while V < V IO IO IO,min V SS t V IO ≤ VCC V IO,min V CC ≤ V while V < V IO IO IO,min MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 www.ti.com SLAS903A – MAY 2013 – REVISED JULY 2013 NOTE: The device supports continuous operation with VCC = VSS while VIO is fully within its specification. During this time, the general-purpose I/Os that reside on the VIO supply domain are configured as inputs and pulled down to VSS through their internal pulldown resistors. RST/NMI is high impedance. BSLEN is configured as an input and is pulled down to VSS through its internal pulldown resistor. When VCC rises above the BOR threshold, the general-purpose I/Os become high-impedance inputs (no pullup or pulldown enabled), RST/NMI becomes an input pulled up to VIO through its internal pullup resistor, and BSLEN remains pulled down to VSS through its internal pulldown resistor. Figure 2. VCC and VIO Power Sequencing Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 45 |
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