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MSP430F5259 数据表(PDF) 7 Page - Texas Instruments

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部件名 MSP430F5259
功能描述  MSP430F525x Mixed Signal Microcontroller
PDF  107 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

MSP430F5259 数据表(HTML) 7 Page - Texas Instruments

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YFF PACKAGE
(TOP VIEW)
A1
B1
C1
D1
E1
F1
G1
H1
A2
B2
C2
D2
E2
F2
G2
H2
A3
B3
A4
B4
D4
E4
F4
G4
H4
A5
B5
D5
E5
F5
G5
H5
A6
B6
D6
E6
H6
A7
B7
D7
E7
H7
A8
B8
D8
E8
F8
G8
H8
D3
E3
F3
G3
H3
C4
C5
C6
C7
C8
F6
F7
G6
G7
P6.0
RSTDVCC PJ.2
TEST RST/NMI BSLEN
P7.4
P7.3
P7.1
P6.2
P6.1
PJ.3
P5.3
P5.2
P7.2
P7.0
P6.4
PJ.1
PJ.0
P4.7
P4.6
P4.5
P6.6
P6.5
P6.7
P4.4
P4.3
P4.2
P5.0
P5.1
P4.1
P4.0
DVIO
P5.4
AVCC
DVSS
P5.5
AVSS
P1.3
P1.6
P2.1
P3.4
P3.2
P3.3
DVCC
P1.0
P1.1
P1.4
P1.7
P2.3
P2.7
P3.0
P3.1
DVSS
VCORE
P1.2
P1.5
P2.0
P2.2
P2.4
P2.5
P2.6
P7.5
C3
P6.3
YFF PACKAGE
(BALL-SIDE VIEW)
E
D
D
E
A1
B1
C1
D1
E1
F1
G1
H1
A2
B2
C2
D2
E2
F2
G2
H2
A3
B3
A4
B4
D4
E4
F4
G4
H4
A5
B5
D5
E5
F5
G5
H5
A6
B6
D6
E6
H6
A7
B7
D7
E7
H7
A8
B8
D8
E8
F8
G8
H8
D3
E3
F3
G3
H3
C4
C5
C6
C7
C8
F6
F7
G6
G7
P6.0
RSTDVCC
PJ.2
TEST
RST/NMI
BSLEN
P7.4
P7.3
P7.1
P6.2
P6.1
PJ.3
P5.3
P5.2
P7.2
P7.0
P6.4
PJ.1
PJ.0
P4.7
P4.6
P4.5
P6.6
P6.5
P6.7
P4.4
P4.3
P4.2
P5.0
P5.1
P4.1
P4.0
DVIO
P5.4
AVCC
DVSS
P5.5
AVSS
P1.3
P1.6
P2.1
P3.4
P3.2
P3.3
DVCC
P1.0
P1.1
P1.4
P1.7
P2.3
P2.7
P3.0
P3.1
DVSS
VCORE
P1.2
P1.5
P2.0
P2.2
P2.4
P2.5
P2.6
P7.5
C3
P6.3
MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256
MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252
www.ti.com
SLAS903A – MAY 2013 – REVISED JULY 2013
Pin Designation – YFF Package
Package Dimensions: The package dimensions for the YFF package are shown in Table 2. See the package
drawing at the end of this data sheet for more details.
Table 2. YFF Package Dimensions
PACKAGED DEVICES
D
E
MSP430F5259IYFF
3.415 ± 0.03
3.535 ± 0.03
Copyright © 2013, Texas Instruments Incorporated
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