GMS90C31 datasheet(13/59 Pages) HYNIX

13 / 59 page

GMS90 Series

Oct. 2000 Ver 3.1a

XTAL1

Input to the inverting oscillator amplifier and input to

the internal clock generator circuits.To drive the

device from an external clock source, XTAL1 should

be driven, while XTAL2 is left unconnected. There are

no requirements on the duty cycle of the external

clock signal, since the input to the internal clocking

circuitry is divided down by a divide-by-two flip-flop.

Minimum and maximum high and low times as well as

rise fall times specified in the AC characteristics must

be observed.

P2.0-P2.7

24-31

21-28

18-25

I/O

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal

pull-ups. Port 2 pins that have 1s written to them are

pulled high by the internal pull-up resistors and can be

used as inputs. As inputs, port 2 pins that are

externally pulled low will source current because of

the pulls-ups (IIL, in the DC characteristics).Port 2

emits the high-order address byte during fetches from

external program memory and during accesses to

external data memory that use 16-bit addresses

(MOVX @DPTR). In this application it uses strong

internal pull-ups when emitting 1s. During accesses to

external data memory that use 8-bit addresses

(MOVX @Ri), port 2 emits the contents of the P2

special function register.

PSEN

The Program Store Enable

The read strobe to external program memory when

the device is executing code from the external

program memory. PSEN is activated twice each

machine cycle, except that two PSEN activations are

skipped during each access to external data memory.

PSEN is not activated during fetches from internal

program memory.

RESET

A high level on this pin for two machine cycles while

the oscillator is running resets the device. An internal

diffused resistor to VSS permits power-on reset using

only an external capacitor to VCC.

Symbol

Pin Number

Input/

Output

Function

PLCC-

PDIP-

MQFP-

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