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GMS90C31 数据表(PDF) 22 Page - Hynix Semiconductor |
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GMS90C31 数据表(HTML) 22 Page - Hynix Semiconductor |
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22 / 59 page ![]() GMS90 Series 18 Oct. 2000 Ver 3.1a † indicates resident in the GMS9XX54/56/58, not in 9XX51/52. Table 3. Contents of SFRs, SFRs in Numeric Order (cont’d) Address Register Bit 7 6543 210 C8H T2CON TF2 EXF2 RCLK TCLK EXEN 2 TR2 C/T2 CP/R L2 C9H T2MOD - ---- - T2O E † DCEN CAH RC2L CBH RC2H CCH TL2 CDH TH2 D0H PSW CY AC F0 RS1 RS0 OV F1 P E0H ACC F0H B A0 8EH 0 : Enable ALE Signal (Generated ALE Signal) C9H 1 : Disable ALE Signal (Not Generated ALE Signal) T2OE 0 : Disable Timer2 Output 1 : Enable Timer2 Output † † T2OE : Timer2 Output Enable bit A0 : ALE Signal Disable bit SFR bit and byte addressable SFR not bit addressable - : this bit location is reserved |
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