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GMS90C31 数据表(PDF) 41 Page - Hynix Semiconductor |
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GMS90C31 数据表(HTML) 41 Page - Hynix Semiconductor |
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41 / 59 page ![]() GMS90 Series Oct. 2000 Ver 3.1a 37 AC Characteristics for GMS90 series (24MHz) External Data Memory Characteristics Advance Information (24MHz) External Clock Drive Parameter Symbol 24 MHz Oscillator Variable Oscillator 1/tCLCL =3.5 to 24MHz Unit Min. Max. Min. Max. RD pulse width tRLRH 180 - 6tCLCL-70 - ns WR pulse width tWLWH 180 - 6tCLCL-70 - ns Address hold after ALE tLLAX2 15 - tCLCL-27 - ns RD to valid data in tRLDV -118 - 5tCLCL-90 ns Data hold after RD tRHDX 0- 0 - ns Data float after RD tRHDZ -63 - 2tCLCL-20 ns ALE to valid data in tLLDV -200 - 8tCLCL-133 ns Address to valid data in tAVDV -220 - 9tCLCL-155 ns ALE to WR or RD tLLWL 75 175 3tCLCL-50 3tCLCL+50 ns Address valid to WR or RD tAVWL 67 - 4tCLCL-97 - ns WR or RD high to ALE high tWHLH 17 67 tCLCL-25 tCLCL+25 ns Data valid to WR transition tQVWX 5- tCLCL-37 - ns Data setup before WR tQVWH 170 - 7tCLCL-122 - ns Data hold after WR tWHQX 15 - tCLCL-27 - ns Address float after RD tRLAZ -0 - 0 ns Parameter Symbol Variable Oscillator (Freq. = 3.5 to 24MHz) Unit Min. Max. Oscillator period tCLCL 41.7 285.7 ns High time tCHCX 12 tCLCL -tCLCX ns Low time tCLCX 12 tCLCL -tCHCX ns Rise time tCLCH -12 ns Fall time tCHCL -12 ns |
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