GMS90C31 datasheet(23/59 Pages) HYNIX

23 / 59 page

GMS90 Series

Oct. 2000 Ver 3.1a

TIMER / COUNTER 0 AND 1

Timer/Counter 0 and 1 can be used in four operating modes as listed in Table 4:

In the "timer" function (C/T = "0") the register is incremented every machine cycle. Therefore the count rate is

fOSC/12.

In the "counter" function the register is incremented in response to a 1-to-0 transition at its corresponding exter-

nal input pin (P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a falling edge the max. count rate

is fOSC/24. External inputs INT0 and INT1 (P3.2, P3.3) can be programmed to function as a gate to facilitate

pulse width measurements. Figure 2 illustrates the input clock logic.

Figure 2. Timer/Counter 0 and 1 Input Clock Logic

Table 4. Timer/Counter 0 and 1 Operating Modes

Mode

Description

TMOD

Input Clock

Gate

C/T

internal

external (Max.)

8-bit timer/counter with a

divide-by-32 prescaler

fOSC ÷(12×32)

fOSC ÷(24×32)

16-bit timer/counter

fOSC ÷12

fOSC ÷24

8-bit timer/counter with

8-bit auto-reload

fOSC ÷12

fOSC ÷24

Timer/counter 0 used as

one 8-bit timer/counter and

one 8-bit timer Timer 1

stops

fOSC ÷12

fOSC ÷24

fOSC

÷ 12

TMOD

fOSC ÷ 12

P3.4/T0

P3.5/T1

Max.

fOSC/24

C/T

≥1

TCON

TR0 / 1

TMOD

Gate

P3.2 / INT0

P3.3 / INT1

Timer 0/1

Input Clock

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