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80960JD 数据表(PDF) 28 Page - Intel Corporation

部件名 80960JD
功能描述  EMBEDDED 32-BIT MICROPROCESSOR
PDF  61 Pages
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制造商  INTEL [Intel Corporation]
网页  http://www.intel.com
标志 INTEL - Intel Corporation

80960JD 数据表(HTML) 28 Page - Intel Corporation

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80960JD
24
PRELIMINARY
4.3
Connection Recommendations
For clean on-chip power distribution, VCC and VSS
pins separately feed the device’s functional units.
Power and ground connections must be made to all
80960JD power and ground pins. On the circuit
board, every VCC pin should connect to a power
plane and every VSS pin should connect to a ground
plane. Place liberal decoupling capacitance near the
80960JD, since the processor can cause transient
power surges.
Pay special attention to the Test Reset (TRST) pin. It
is essential that the JTAG Boundary Scan Test
Access Port (TAP) controller initializes to a known
state whether it will be used or not. If the JTAG
Boundary Scan function will be used, connect a
pulldown resistor between the TRST pin and V
S S. If
the JTAG Boundary Scan function will not be used
(even for board-level testing), connect the TRST pin
to V
SS. Also, do not connect the TDI, TDO, and TCK
pins if the TAP Controller will not be used.
Pins identified as NC must not be connected in
the system.
4.4
DC Specifications
Table 13. 80960JD DC Characteristics
Symbol
Parameter
Min
Typ
Max
Units
Notes
VIL
Input Low Voltage
-0.3
0.8
V
V
IH
Input High Voltage
2.0
V
CC + 0.3
V
VOL
Output Low Voltage
0.45
V
IOL = 5 mA
VOH
Output High Voltage
2.4
VCC - 0.5
V
IOH = -1 mA
IOH = -200 µA
V
OLP
Output Ground Bounce
< 0.8
V
(1,2)
CIN
Input Capacitance
PGA
PQFP
12
10
pF
fCLKIN = fMIN (2)
C
OUT
I/O or Output Capacitance
PGA
PQFP
12
10
pF
fCLKIN = fMIN (2)
CCLK
CLKIN Capacitance
PGA
PQFP
12
10
pF
fCLKIN = fMIN (2)
NOTES:
1. Typical is measured with V
CC = 5.0V and temperature = 25 °C.
2. Not tested.



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