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80960JD 数据表(PDF) 35 Page - Intel Corporation |
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80960JD 数据表(HTML) 35 Page - Intel Corporation |
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35 / 61 page ![]() PRELIMINARY 31 80960JD Table 18. 80960JD AC Characteristics (33 MHz) (Sheet 1 of 2) Symbol Parameter Min Max Units Notes INPUT CLOCK TIMINGS T F CLKIN Frequency 8 16.67 MHz TC CLKIN Period 60 125 ns TCS CLKIN Period Stability ± 250 ps (1, 2) T CH CLKIN High Time 24 ns Measured at 1.5 V (1) TCL CLKIN Low Time 24 ns Measured at 1.5 V (1) TCR CLKIN Rise Time 8 ns 0.8 V to 2.0 V (1) T CF CLKIN Fall Time 8 ns 2.0 V to 0.8 V (1) SYNCHRONOUS OUTPUT TIMINGS TOV1 Output Valid Delay, Except ALE/ALE Inactive and DT/R 3.5 19 ns (3) T OV2 Output Valid Delay, DT/R 0.5T C + 3.5 0.5T C + 19 ns T O F Output Float Delay 3.5 18 ns (4) SYNCHRONOUS INPUT TIMINGS TIS1 Input Setup to CLKIN — AD31:0, NMI, XINT7:0 8 ns (5) T IH1 Input Hold from CLKIN — AD31:0, NMI, XINT7:0 2 ns (5) TIS2 Input Setup to CLKIN — RDYRCV and HOLD 9 ns (6) TIH2 Input Hold from CLKIN — RDYRCV and HOLD 1 ns (6) T IS3 Input Setup to CLKIN — RESET 8 ns (7) TIH3 Input Hold from CLKIN — RESET 2 ns (7) TIS4 Input Setup to RESET — ONCE, STEST 8 ns (8) T IH4 Input Hold from RESET — ONCE, STEST 2 ns (8) RELATIVE OUTPUT TIMINGS TLXL ALE/ALE Width 0.5T C - 8 ns (9) T LXA Address Hold from ALE/ALE Inac- tive Equal Loading (9) TDXD DT/R Valid to DEN Active Equal Loading (9) |
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