MAT02

–6–

REV. E

Figure 1. Log Conformance Test Circuit

LOG CONFORMANCE TESTING

The log conformance of the MAT02 is tested using the circuit

shown above. The circuit employs a dual transdiode logarithmic

converter operating at a fixed ratio of collector currents that are

swept over a 10:1 range. The output of each transdiode converter

×100 by the

AMP01 instrumentation amplifier. The differential emitter-base

voltage (

an ac error voltage, which is the deviation from true log confor-

mity as the collector currents vary.

The output of the transdiode logarithmic converter comes from

the idealized intrinsic transistor equation (for silicon):

V

kT

q

In

I

I

BE

C

S

=

(1)

where

k = Boltzmann’s Constant (1.38062

q = Unit Electron Charge (1.60219

T = Absolute Temperature, K (=

°C + 273.2)

→0

An error term must be added to this equation to allow for the

input current is limited by use of the OP15 BiFET-input op

amp. The resulting AMP01 input is:

∆V

kT

q

In

(2)

A ramp function that sweeps from 1 V to 10 V is converted by

the op amps to a collector current ramp through each transistor.

°C,

the previous equation becomes:

∆V

∆r

As viewed on an oscilloscope, the change in

∆V

Figure 2.

With the oscilloscope ac coupled, the temperature dependent

term becomes a dc offset and the trace represents the deviation

from true log conformity. The bulk resistance can be calculated

from the voltage deviation

∆V

current (9 mA):

∆V

O

9 mA

×

1

100

(3)