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MAT02

–7–

REV. E

Figure 3. One-Quadrant Multiplier/Divider

APPLICATIONS: NONLINEAR FUNCTIONS

MULTIPLIER/DIVIDER CIRCUIT

The excellent log conformity of the MAT02 over a very wide

range of collector current makes it ideal for use in log-antilog

circuits. Such nonlinear functions as multiplying, dividing,

squaring and square-rooting are accurately and easily imple-

mented with a log antilog circuit using two MAT02 pairs (see

Figure 3). The transistor circuit accepts three input currents (I1,

I2 and I3) and provides an output current IO according to

IO = I1I2/I3. All four currents must be positive in the log antilog

circuit, but negative input voltages can be easily accommodated

by various offsetting techniques. Protective diodes across each

base-to-emitter junction would normally be needed, but these

diodes are built into the MAT02. External protection diodes

are, therefore, not needed.

For the circuit shown in Figure 3, the operational amplifiers

make I1 = VX/R1, I2 = VY/R2, I3 = VZ/R3, and IO = VO/RO. The

output voltage for this one-quadrant, log-antilog multiplier/

divider is ideally:

VO =

R3RO

R1R2

V XVY

V Z

(VX, VY, VZ > 0)

(4)

If all the resistors (RO, R1, R2, R3) are made equal, then

VO = VXVY/VZ

Resistor values of 50 k

Ω to 100 kΩ are recommended assuming

an input range of 0.1 V to +10 V.

ERROR ANALYSIS

The base-to-emitter voltage of the MAT02 in its forward active

operation is:

VBE =

+ rBEIC, VCB ~ 0

(5)

The first term comes from the idealized intrinsic transistor

equation previously discussed (see equation (1)).

Extrinsic resistive terms and the early effect cause departure

from the ideal logarithmic relationship. For small VCB, all of

these effects can be lumped together as a total effective bulk

resistance rBE. The rBEIC term causes departure from the desired

logarithmic relationship. The rBE term for the MAT02 is less

than 0.5

Ω and ∆rBE between the two sides is negligible.

Returning to the multiplier/divider circuit of Figure 1 and using

Equation (4):

VBE1A + VBE2A – VBE2B – VBE1B + (I1 + I2 – IO – I3) rBE = 0

If the transistor pairs are held to the same temperature, then:

S ASA

SB S B

+ (I1 + I2 – IO – I3) rBE (6)

If all the terms on the right-hand side were zero, then In

(I1 I2/I3 IO) would equal zero, which would lead directly to

the desired result:

IO =

I1I2

, where I1, I2, I3, IO > 0

(7)

Note that this relationship is temperature independent. The

right-hand side of Equation (6) is near zero and the output

current IO will be approximately I1 I2/I3. To estimate error,

define ø as the right-hand side terms of Equation (6):

ø = In

S ASA

SB S B

(I1 + I2 – IO – I3) rBE

(8)

For the MAT02, In (ISA/ISB) and ICrBE are very small. For small

ø,

εØ ~ 1 + ø and therefore:

I1I2

I3IO

= 1 + ø

(9)

IO ~

I1I2

(1 – ø)

The In (ISA/ISB) terms in ø cause a fixed gain error of less than

±0.6% from each pair when using the MAT02, and this gain

error is easily trimmed out by varying RO. The IOUT terms are

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