AN4192 datasheet(7/47 Pages) STMICROELECTRONICS

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AN4192

Synchronous buck converter: a brief introduction

Doc ID 023820 Rev 1

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Figure 2.

HS/LS gate-source voltages

The load current doesn't become zero (the output coil doesn't discharge completely): the

converter works in continuous current mode (CCM). After the LS turns off, the load current

re-flows through the LS body diode (deadtime) and then another switching cycle begins.

As the input voltage is typically 12 V and the core voltage is 1.2 - 1.3 V, the converter duty

cycle is small (0.1- 0.2%): then, the HS FET is on for a shorter time, while the LS FET has

longer ton.

Modern VRM topologies should have some additional features:

●

High switching frequencies working capability

●

Ever-increasing output current to be delivered to the load

●

Input and output current ripple minimized.

To match these requirements, the “multiphase” approach (Figure 3) is universally used,

developed by interleaving more single-phase SBCs, connected together in the output

capacitor pins. In this way, we obtain some advantages:

Each phase can manage up to 25 - 30 A (according to the layout and cooling down

characteristics): so, it is possible to handle high currents, with improved efficiency.

Moreover, the device reliability increases.

The total load current is given by adding all the phase currents: this causes a

strong reduction of the output current ripple.

Input and output filter component size and dimension can be minimized; the

converter working capability at high switching frequencies increases.

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core

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AM16446V1

AN4192 数据表(PDF) 7 Page - STMicroelectronics