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AN4192 数据表(PDF) 39 Page - STMicroelectronics |
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AN4192 数据表(HTML) 39 Page - STMicroelectronics |
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39 / 47 page ![]() AN4192 Low-side FET selection Doc ID 023820 Rev 1 39/47 Figure 48. Original configuration waveforms @ 20 A As a first step, the LS external gate resistance is increased to 1.8 Ω (“Configuration 1"); in Figure 49 the relevant waveforms are depicted. The phase node overshoot is 31 V. Figure 49. RG,HS(EXT) = 0 Ω - RG,HS(EXT) = 1.8 Ω/original snubber waveforms @ 20 A AM16491V1 AM16492V1 |
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