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AN2784 数据表(PDF) 9 Page - STMicroelectronics |
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AN2784 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 31 page ![]() AN2784 Interfacing with a nonmultiplexed, asynchronous 16-bit NOR Flash memory Doc ID 14779 Rev 4 9/31 2 Interfacing with a nonmultiplexed, asynchronous 16-bit NOR Flash memory 2.1 FSMC configuration To control a NOR Flash memory, the FSMC provides the following possible features: ● Select the bank to be used to map the NOR Flash memory: there are 4 independent banks which can be used to interface with NOR Flash/SRAM/PSRAM memories, each bank has a separate Chip Select pin. ● Enable or disable the address/data multiplexing feature ● Select the memory type to be used: NOR Flash/SRAM/PSRAM ● Define the external memory databus width: 8/16 bits ● Enable or disable the burst access mode for synchronous NOR Flash memories ● Configure the use of the wait signal: enable/disable, polarity setting and timing configuration. ● Enable or disable the extended mode: this mode is used to access the memory with a different timing configuration for read and write operations. As the NOR Flash/PSRAM controller can support asynchronous and synchronous memories, the user should select only the used parameters depending on the memory characteristics. The FSMC also provides the possibility of programming several parameters to correctly interface with the external memory. Depending on the memory type, some parameters are not used. In the case where an external asynchronous nonmultiplexed memory is used, the user has to compute and set the following parameters depending on the information in the memory datasheet: ● ADDSET: address setup time ● DATAST: data setup time ● ACCMOD: access mode This parameter gives the FSMC the flexibility to access a wide variety of asynchronous static memories. There are four extended access modes (A, B, C and D) that allow write access while reading the memory with different timings, if the memory supports this kind of feature. When the extended mode is enabled, the FSMC_BTR register is used for read operations and the FSMC_BWR register is used for write operations. In the case where a synchronous memory is used, the user has to compute and set the following parameters: ● CLKDIV: clock divide ratio ● DATLAT: data latency Note that NOR Flash memory read operations can be synchronous if the memory supports this mode, while write operations usually remain asynchronous. When programming a synchronous NOR Flash memory, the memory automatically switches between the synchronous and the asynchronous mode, so in this case, all parameters have to be set correctly. |
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