MPC8264AVR datasheet(12/48 Pages) MOTOROLA

12 / 48 page

MPC826xA (HiP4) Family Hardware Speciﬁcations

MOTOROLA

Electrical and Thermal Characteristics

1.2.3.1

Layout Practices

Each VCC pin should be provided with a low-impedance path to the board’s power supply. Each ground pin

should likewise be provided with a low-impedance path to ground. The power supply pins drive distinct

groups of logic on chip. The VCC power supply should be bypassed to ground using at least four 0.1 µF

by-pass capacitors located as close as possible to the four sides of the package. The capacitor leads and

associated printed circuit traces connecting to chip VCC and ground should be kept to less than half an inch

per capacitor lead. A four-layer board is recommended, employing two inner layers as VCC and GND planes.

All output pins on the MPC826xA have fast rise and fall times. Printed circuit (PC) trace interconnection

length should be minimized in order to minimize overdamped conditions and reﬂections caused by these

fast output switching times. This recommendation particularly applies to the address and data buses.

Maximum PC trace lengths of six inches are recommended. Capacitance calculations should consider all

device loads as well as parasitic capacitances due to the PC traces. Attention to proper PCB layout and

bypassing becomes especially critical in systems with higher capacitive loads because these loads create

higher transient currents in the VCC and GND circuits. Pull up all unused inputs or signals that will be inputs

during reset. Special care should be taken to minimize the noise levels on the PLL supply pins.

Table 5 provides preliminary, estimated power dissipation for various conﬁgurations. Note that suitable

thermal management is required for conditions above PD = 3W (when the ambient temperature is 70˚ C or

greater) to ensure the junction temperature does not exceed the maximum speciﬁed value. Also note that the

I/O power should be included when determining whether to use a heat sink.

1.2.4

AC Electrical Characteristics

The following sections include illustrations and tables of clock diagrams, signals, and CPM outputs and

inputs for the 66 MHz MPC826xA device. Note that AC timings are based on a 50-pf load. Typical output

buffer impedances are shown in Table 6.

Table 5. Estimated Power Dissipation for Various Conﬁgurations1

1 Test temperature = room temperature (25˚ C)

Bus

(MHz)

CPM

Multiplier

Core CPU

Multiplier

CPM

(MHz)

CPU

(MHz)

PINT(W)

2 P

INT = IDD x VDD Watts

Vddl 1.8 Volts

Vddl 2.0 Volts

Nominal

Maximum

Nominal

Maximum

66.66

133

200

1.2

1.8

2.3

66.66

2.5

166

200

1.3

2.1

1.9

2.3

66.66

200

266

—

2.3

2.9

66.66

4.5

200

300

—

2.4

3.1

83.33

166

250

—

2.2

2.8

83.33

166

250

—

2.2

2.8

83.33

2.5

3.5

208

291

—

2.4

3.1

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