MPC8264AVR datasheet(26/48 Pages) MOTOROLA

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MPC826xA (HiP4) Family Hardware Speciﬁcations

MOTOROLA

Clock Conﬁguration Modes

1001_100

66 MHz

3.5

233 MHz

4.5

300 MHz

4/8

58/29 MHz

1010_000

100 MHz

200 MHz

3/6

66/33 MHz

1010_001

100 MHz

200 MHz

2.5

250 MHz

3/6

66/33 MHz

1010_010

100 MHz

200 MHz

300 MHz

3/6

66/33 MHz

1010_011

100 MHz

200 MHz

3.5

350 MHz

3/6

66/33 MHz

1010_100

100 MHz

200 MHz

400 MHz

3/6

66/33 MHz

1011_000

100 MHz

2.5

250 MHz

200 MHz

4/8

62/31 MHz

1011_001

100 MHz

2.5

250 MHz

2.5

250 MHz

4/8

62/31MHz

1011_010

100 MHz

2.5

250 MHz

300 MHz

4/8

62/31 MHz

1011_011

100 MHz

2.5

250 MHz

3.5

350 MHz

4/8

62/31 MHz

1011_100

100 MHz

2.5

250 MHz

400 MHz

4/8

62/31 MHz

1 Input clock frequency is given only for the purpose of reference. User should set MODCK_H–MODCK_L so that

the resulting conﬁguration does not exceed the frequency rating of the user’s part.

2 The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency is

divided by 2 (33 instead of 66 MHz, etc.). Refer to Table 14.

3 In this mode, PCI_MODCK must be “0”.

Table 16. Clock Conﬁguration Modes in PCI Host Mode (Continued)

MODCK_H –

MODCK[1–3]

Input Clock

Frequency1

(Bus)

CPM

Multiplication

Factor

CPM

Frequency

Core

Multiplication

Factor

Core

Frequency

PCI Division

Factor2

PCI

Frequency2

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