EM346-RTR datasheet(52/142 Pages) SILABS

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EM346

Rev 1.0



Reading GPIO_PxIN returns a constant 1.

7.6.2. Input Mode

Input mode is used both for general purpose input and for on-chip peripheral inputs. Input floating mode disables

the internal pull-up and pull-down resistors, leaving the pin in a high-impedance state. Input pull-up or pull-down

mode enables either an internal pull-up or pull-down resistor based on the GPIO_PxOUT register. Setting a bit to 0

in GPIO_PxOUT enables the pull-down and setting a bit to 1 enables the pull up.

When configured in input mode:



The output drivers are disabled.



An internal pull-up or pull-down resistor may be activated depending on GPIO_PxCFGH/L and

GPIO_PxOUT.



The Schmitt trigger input is connected to the pin.



Reading GPIO_PxIN returns the input at the pin.



The input is also available to on-chip peripherals.

7.6.3. Output Mode

Output mode provides a general purpose output under direct software control. Regardless of whether an output is

configured as push-pull or open-drain, the GPIO’s bit in the GPIO_PxOUT register controls the output. The

GPIO_PxSET and GPIO_PxCLR registers can atomically set and clear bits within GPIO_PxOUT register. These

set and clear registers simplify software using the output port because they eliminate the need to disable interrupts

to perform an atomic read-modify-write operation of GPIO_PxOUT.

When configured in output mode:



The output drivers are enabled and are controlled by the value written to GPIO_PxOUT:



In open-drain mode: 0 activates the N-MOS current sink; 1 tri-states the pin.



In push-pull mode: 0 activates the N-MOS current sink; 1 activates the P-MOS current source.



The internal pull-up and pull-down resistors are disabled.



The Schmitt trigger input is connected to the pin.



Reading GPIO_PxIN returns the input at the pin.

Note: Reading GPIO_PxOUT returns the last value written to the register.

Depending on configuration and usage, GPIO_PxOUT and GPIO_PxIN may not have the same value.

7.6.4. Alternate Output Mode

In this mode, the output is controlled by an on-chip peripheral instead of GPIO_PxOUT and may be configured as

either push-pull or open-drain. Most peripherals require a particular output type, but since using a peripheral does

not by itself configure a pin, the GPIO_PxCFGH/L registers must be configured properly for a peripheral’s particular

needs. As described in "7.2. Configuration" on page 49, when more than one peripheral can be the source of

output data, registers in addition to GPIO_PxCFGH/L determine which to use.

When configured in alternate output mode:



The output drivers are enabled and are controlled by the output of an on-chip peripheral:



In open-drain mode: 0 activates the N-MOS current sink; 1 tri-states the pin.



In push-pull mode: 0 activates the N-MOS current sink; 1 activates the P-MOS current source.



The internal pull-up and pull-down resistors are disabled.



The Schmitt trigger input is connected to the pin.

Note: Reading GPIO_PxIN returns the input to the pin.

Depending on configuration and usage, GPIO_PxOUT and GPIO_PxIN may not have the same value.

7.7. Wake Monitoring

The GPIO_PxWAKE registers specify which GPIOs are monitored to wake the processor. If a GPIO’s wake enable

bit is set in GPIO_PxWAKE, then a change in the logic value of that GPIO causes the EM346 to wake from deep

sleep. The logic values of all GPIOs are captured by hardware upon entering sleep. If any GPIO’s logic value

changes while in sleep and that GPIO’s GPIO_PxWAKE bit is set, then the EM346 wakes from deep sleep. (There

is no mechanism for selecting a specific rising-edge, falling-edge, or level on a GPIO: any change in logic value

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