LAN8710AI datasheet(35/82 Pages) MICROCHIP

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Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology

Datasheet

SMSC LAN8710A/LAN8710Ai

Revision 1.4 (08-23-12)

DATASHEET

Note: The ENERGYON bit in the Mode Control/Status Register is defaulted to a ‘1’ at the start of the

signal acquisition process, therefore the INT7 bit in the Interrupt Mask Register will also read

as a ‘1’ at power-up. If no signal is present, then both ENERGYON and INT7 will clear within

a few milliseconds.

3.6.2

Alternate Interrupt System

The Alternate interrupt system is enabled by setting the ALTINT bit of the Mode Control/Status Register

to “1”. In this mode, to set an interrupt, set the corresponding bit of the in the Mask Register 30, (see

Table 3.4). To Clear an interrupt, either clear the corresponding bit in the Interrupt Mask Register to

deassert the nINT output, or clear the interrupt source, and write a ‘1’ to the corresponding Interrupt

Source Flag. Writing a ‘1’ to the Interrupt Source Flag will cause the state machine to check the

Interrupt Source to determine if the Interrupt Source Flag should clear or stay as a ‘1’. If the Condition

to deassert is true, then the Interrupt Source Flag is cleared and nINT is also deasserted. If the

Condition to deassert is false, then the Interrupt Source Flag remains set, and the nINT remains

asserted.

For example, setting the INT7 bit in the Interrupt Mask Register will enable the ENERGYON interrupt.

After a cable is plugged in, the ENERGYON bit in the Mode Control/Status Register goes active and

nINT will be asserted low. To de-assert the nINT interrupt output, either clear the ENERGYON bit in

the Mode Control/Status Register by removing the cable and then writing a ‘1’ to the INT7 bit in the

Interrupt Mask Register, OR clear the INT7 mask (bit 7 of the Interrupt Mask Register).

Note: The ENERGYON bit in the Mode Control/Status Register is defaulted to a ‘1’ at the start of the

signal acquisition process, therefore the INT7 bit in the Interrupt Mask Register will also read

as a ‘1’ at power-up. If no signal is present, then both ENERGYON and INT7 will clear within

a few milliseconds.

Table 3.4 Alternative Interrupt System Management Table

MASK

INTERRUPT SOURCE

FLAG

INTERRUPT SOURCE

EVENT TO

ASSERT nINT

CONDITION

DE-ASSERT

BIT TO

CLEAR

nINT

30.7

29.7

ENERGYON

17.1

ENERGYON

Rising 17.1

17.1 low

29.7

30.6

29.6

Auto-Negotiation

complete

1.5

Auto-Negotiate

Complete

Rising 1.5

1.5 low

29.6

30.5

29.5

Remote Fault

Detected

1.4

Remote Fault

Rising 1.4

1.4 low

29.5

30.4

29.4

Link Down

1.2

Link Status

Falling 1.2

1.2 high

29.4

30.3

29.3

Auto-Negotiation

LP Acknowledge

5.14

Acknowledge

Rising 5.14

5.14 low

29.3

30.2

29.2

Parallel

Detection Fault

6.4

Parallel Detection

Fault

Rising 6.4

6.4 low

29.2

30.1

29.1

Auto-Negotiation

Page Received

6.1

Page Received

Rising 6.1

6.1 low

29.1

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