M35B32 datasheet(23/44 Pages) STMICROELECTRONICS

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M35B32

Instructions

6.7

Page Write (PW)

As shown in Figure 13, to send this instruction to the device, Chip Select (S) is first driven

low. The bits of the instruction byte, address bytes, and at least one data byte are then

shifted in, on Serial Data Input (D). The instruction is terminated by driving Chip Select (S)

high at a byte boundary of the input data. In the case of Figure 13, this occurs after the

eighth bit of the data byte has been latched in, indicating that the instruction is being used to

write a single byte. The self-timed Write cycle starts from the rising edge of Chip Select (S),

and continues for a period tPW (as specified in Table 11), at the end of which the Write in

Progress (WIP) bit is reset to 0.

However, if Chip Select (S) continues to be driven low, the next byte of input data is shifted

in, so that more than a single byte, starting from the given address towards the end of the

same page, can be written in a single internal Write cycle.

Each time a new data byte is shifted in, the least significant bits of the internal address

counter are incremented. If the number of data bytes sent to the device exceeds the page

boundary, the internal address counter rolls over to the beginning of the page, and the

previous data there are overwritten with the incoming data. (The page size of these devices

is 256 bytes).

The instruction is not accepted, and is not executed, under the following conditions:

•

If the Write Enable Latch (WEL) bit has not been set to 1 (by executing a Write Enable

instruction just before)

•

If a write cycle is already in progress

•

If the device has not been deselected, by Chip Select (S) being driven high, at a byte

boundary (after the eighth bit b0, of the last data byte that has been latched in)

•

If the addressed page is in the region protected by the Block Protect (BP3, BP2, BP1,

BP0) bits.

Note:

The self-timed write cycle tPW is internally executed as a sequence of two consecutive

events: [Erase addressed byte(s)], followed by [Program addressed byte(s)]. An erased bit

is read as “1” and a programmed bit is read as “0”.

A Page Write (PW) instruction applied to a page that is Hardware Protected is not executed.

Any Page Write (PW) instruction, while an Erase, Program or Write cycle is in progress, is

rejected without having any effects on the cycle that is in progress.

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