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M35B32 数据表(PDF) 28 Page - STMicroelectronics

部件名 M35B32
功能描述  32 Kbit, 256-byte page, fast program EEPROM memory accessed by SPI bus interface
PDF  44 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M35B32 数据表(HTML) 28 Page - STMicroelectronics

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Instructions
M35B32
28/44
DocID18391 Rev 4
6.11
Sector Erase (SE)
The M35B32 offers two sectors: the Data sector and the Event sector.
The Sector Erase (SE) instruction sets to 1 (FFh) all bits inside the chosen sector:
when the transmitted address is inside the Event sector, the data in the Event sector
are erased if the W pin is driven high
when the transmitted address is inside the Data sector, the data in the top pages are
erased (whatever the state of the W pin)
when the transmitted address is above 1000h: no action
Before it can be accepted, a Write Enable (WREN) instruction must previously have been
executed.
After the Write Enable, the Sector Erase (SE) instruction is entered by driving Chip Select
(S) low, followed by the instruction code, and two address bytes on Serial Data Input (D).
Any address inside the Sector is a valid address for the Sector Erase (SE) instruction. Chip
Select (S) must be driven low for the entire duration of the sequence.
The instruction sequence is shown in Figure 16.
Chip Select (S) must be driven high after the eighth bit of the last address byte has been
latched in, otherwise the Sector Erase (SE) instruction is not executed. As soon as Chip
Select (S) is driven high, the self-timed Sector Erase cycle (whose duration is tSE) is
initiated. While the Sector Erase cycle is in progress, the Status Register may be read to
check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is at 1
during the self-timed Sector Erase cycle, and it is at 0 when the cycle is complete. The Write
Enable Latch (WEL) bit is also reset (or not) once the self-timed Sector Erase cycle is
complete, depending on the logical level applied on the W input pin and the value of the
decoded address, as shown in Table 4.
A Sector Erase (SE) instruction applied to a sector that contains a page that is Hardware
Protected is not executed.
Any Sector Erase (SE) instruction, while an Erase, Program or Write cycle is in progress, is
rejected without having any effects on the cycle that is in progress.
Figure 16. Sector Erase (SE) instruction sequence
1. Address bits A15 to A12 are Don’t Care.
16-bit address
C
D
AI15476
S
2
1
3456789
29 30 31
Instruction
0
15 14
2
0
1
MSB



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