LNBH26LS

Application information (valid for each section

A/B)

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A, OLF-B). One bit is dedicated to the input voltage power not good function (PNG). Once

the OTF bit (or OLF-A, OLF-

B or PNG) has been activated (set to “1”), it is latched to “1”

until the relevant cause is removed and a new register reading operation is performed.

2.7

Surge protection and TVS diodes

Each LNBH26LS device section is directly connected to the antenna cable in a set-top box.

Atmospheric phenomenon can cause high voltage discharges on the antenna cable

causing damage to the attached devices. Surge pulses occur due to direct or indirect

lightning strikes to an external (outdoor) circuit. This leads to currents or electromagnetic

fields causing high voltage or current transients. Transient voltage suppressor (TVS)

devices are usually placed, as shown in the following schematic, to protect each section of

STB output circuits where the LNBH26LS and other devices are electrically connected to

the antenna cable.

Figure 4: Surge protection circuit

For this purpose the use of LNBTVSxx surge protection diodes specifically designed by ST

is recommended. The selection of the LNBTVS diode should be made based on the

maximum peak power dissipation that the diode is capable of supporting (see the LNBTVS

datasheet for further details).

2.8

Power-on I²C interface reset and undervoltage lockout

The I²C interface built into the LNBH26LS is automatically reset at power-on. As long as

does not respond to any I²C command and all data register bits are initialized to zeroes,

interface becomes operative and the DATA registers can be configured by the main

microprocessor.

2.9

PNG: input voltage minimum detection

thresholds, the PNG I²C bit is set to “1”. Refer to the Table 14: "I²C electrical

characteristics" for threshold details.

2.10

COMP: boost capacitors and inductor

The DC-DC converter compensation loop can be optimized in order to properly work with

4 register (see COMP not found) can be set to “1” or “0” as follows:

COMP = 0 for electrolytic capacitors

COMP = 1 for ceramic capacitors

GIPD1311131146LM