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LNBH26LS 数据表(PDF) 19 Page - STMicroelectronics |
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LNBH26LS 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 33 page ![]() LNBH26LS I²C interface protocol DocID025504 Rev 1 19/33 7 I²C interface protocol 7.1 Write mode transmission The LNBH26LS interface protocol is made up of: A start condition (S) A chip address byte with the LSB bit R/W = 0 A register address (internal address of the first register to be accessed) A sequence of data (byte to write to the addressed internal register + acknowledge) The following bytes, if any, to be written to successive internal x A STOP condition (P), the transfer lasts until a stop bit is encountered The LNBH26LS, as slave, acknowledges every byte transfer Figure 10: Example of writing procedure starting with first data address 0x2 ACK = acknowledge S = start P = stop R/W = 1/0, read/write bit X = 0/1, set the values to select the chip address (see Table 13: "Output voltage selection table (data1 register, write mode)" for pin selection) and to select the register address (see Table 6: "DATA 1 (read/write register. Register address = 0X2)" and Table 10: "STATUS 1 (read register. Register address = 0X0)"). The writing procedure can start from any register address by simply setting the X values in the register address byte (after the chip address). It can be also stopped by the master by sending a STOP condition after any acknowledge bit. |
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