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VD5377 数据表(PDF) 45 Page - STMicroelectronics |
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VD5377 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 88 page  Doc ID 022952 Rev 2 45/88 VD5377 Additional features 83 BACKLIGHT_ CONTROL bBackLightEnable 0 RW 00 BACKLED PWM enable 0 = Disable 1 = Enable bSingleBackled 1 RW 00 Single BACKLED scheme control par PWM0 only 0 = 3 independent BackLEDs 1 = BackLED controlled by PWM 0 bPwmPolarity 2 RW 00 BACKLED PWM signal polarity 0 = High when LED must be ON (=pwm0) 1 = Low when LED must be ON (=!pwm0) bBackledGaterEna ble 3RW 00 Enable the gating of BACKLED PWM signal with DMIB gater signal 0 = Disable 1 = Enable bPwmHoldEnable 4 RW 00 Enable the hold mechanism when DMIB gater signal is ON 0 = Disable 1 = Enable bBackLightReset 7 RWC 00 In SW STBY, reset the control of backlight control (self cleared) 0 = Disable 1 = Enable Table 26. BACKLED control registers (continued) Addr (Hex) Register name SIgnal name Bit Type Default (Hex) Comment |
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